Reconfigurable ferroelectric transistor array for embodied neuromorphic vision with hardware-native sensing, computing, and activation

Edge artificial intelligence (AI) and embodied vision call for compact, fast, and energy-efficient hardware that integrates sensing, linear analog computation, and nonlinear activation, while flexibly reallocating these functions as workloads change. However, in-sensor computing (ISC) and in-memory computing (IMC) platforms still implement activation with external peripherals and use fixed functional partitions, which break the analog signal path and restrict system reconfigurability. Here, we report a reconfigurable ferroelectric transistor (Fe-FET) array in which polarization-programmed local fields enable junction-barrier engineering in ambipolar tungsten diselenide (WSe 2 ) channel. This junction-barrier engineering mechanism co-programs photoresponsivity, multilevel conductance, and tunable nonlinear transport within the same device, allowing each Fe-FET cell to be reassigned among weighted sensing (ISC), linear accumulation (IMC), and hardware-native activation. The array therefore functions as a uniform pool of physical units whose roles and spatial partitions can be dynamically allocated to match task demands without changing the hardware platform. Using this role-reconfigurable platform, we implement an end-to-end analog neuromorphic vision system in which broadband sensing, linear computation, and nonlinear activation are executed natively on the same Fe-FET platform. These results establish a task-adaptive and energy-efficient route toward scalable neuromorphic vision hardware for edge intelligence.