Experimental Validation and Comparative Assessment of PD and MPC for a Quadratic Buck Converter Using a C2000 DSP

This paper presents the design, digital implementation, and experimental validation of a new 50 W scaled prototype of a quadratic buck converter (48 V to 5 V, 10 A) controlled by a finite control set model predictive control (FCS-MPC) strategy. The converter utilizes its quadratic step-down topology to achieve high voltage conversion gain without extreme duty cycles, making it suitable for low-power applications requiring precise voltage regulation. The proposed methodology encompasses the theoretical design of the power stage, the development of the experimental prototype based on a C2000 Digital Signal Processor DSP, and a comparative performance assessment between the proposed FCS-MPC and a conventionally tuned PD controller. An iterative tuning and real-time validation process is employed to optimize both the converter parameters and the control law, ensuring closed-loop stability and enhanced dynamic response under line and load disturbances. The experimental results demonstrate that the FCS-MPC strategy significantly outperforms the PD controller in terms of output voltage regulation, settling time (4.2 s vs. 5 ms), and disturbance rejection (<2 ms recovery). The main contribution of this work is the construction of a new scaled prototype and the experimental validation of a predictive control strategy for a high-gain DC–DC converter, positioning the FCS-MPC-controlled quadratic buck converter as a viable solution for modern applications demanding high energy efficiency and robustness.