A Split-Filtering-Based Bias Reduction Method for TRNGs: Circuit Architecture and Experimental Validation
Abstract TRNGs serve as the core entropy primitives in cryptographic hardware. This paper's recent white-box tomography method identified the composite metastability contribution $s\varepsilon_m$ as the overwhelmingly dominant source of output bias. However, existing bias suppression strategies remain limited to statistical post-processing---masking statistical defects instead of resolving the physical root causes. This paper proposes a fundamentally different path: directly filtering out metastable sampling events at the physical layer, achieving targeted therapy for the entropy source. The split-filtering circuit architecture identifies and discards common-mode events at the physical layer through complementary clock generation with 180$^\circ$ phase difference and balanced duty cycle, dual-edge sampling, and XNOR comparison logic. A residual bias closed-form model $\varepsilon_{\text{res}} \approx (1-\eta)s\varepsilon_m$ is established, where filtering efficiency $\eta$ is directly measurable via the off/on-criterion raw bias ratios. Verified on an FPGA-silicon hybrid platform across five independent chips and over 200 million raw bits, the circuit reduces output bias from 1.12\% to 0.37\%, yielding a 66.6\% bias reduction ($\eta=0.666$, $\sigma=0.009$) without any post-processing. For raw seed-level unprocessed data, the average number of failed items in the NIST SP 800-22 expanded test suite decreases from 165.8 to 75.2 (a 54.6\% reduction), and the AIS-31 T0--T8 pass rate improves from 0\% to 90\%--100\%. Moreover, complementary sampling delivers inherent common-mode noise immunity, without introducing extra timing jitter or secondary drift artifacts. This work closes the diagnosis-to-therapy loop, shifting TRNG design away from post-processing defect masking toward verifiable, auditable physical-layer entropy purification---laying the foundation for post-processing-free, intrinsically verifiable hardware entropy sources.
Authors
- Shicong Zhou (ORCID: https://orcid.org/0000-0001-5331-7878)
Institutions
- Institute of Microelectronics (CN)
- United Microelectronics (United States) (US)
Publication Details
- Journal
- Zenodo (CERN European Organization for Nuclear Research)
- Published
- 2026-07-17
- DOI
- https://doi.org/10.5281/zenodo.21410341
- Primary Topic
- Cryptographic Implementations and Security
- Type
- preprint