Radiation-Hardened FPGA Architectures and Design Techniques for Space Applications: A Comprehensive Review

Abstract Field-Programmable Gate Arrays (FPGAs) have become an important technology in modern space systems because of their flexibility, reconfigurability, high processing power, and shorter development time. They are commonly used in satellite payloads, onboard data processing, communication systems, autonomous navigation, and scientific tools. However, the extreme radiation conditions found in space create significant reliability issues for FPGA-based systems. Radiation-related problems such as Total Ionizing Dose (TID), Single Event Upsets (SEUs), Single Event Transients (SETs), Single Event Latchups (SELs), and Single Event Functional Interrupts (SEFIs) can reduce performance, damage data, and lead to mission failures.To tackle these issues, various radiation-hardening methods have been developed at the device, circuit, architecture, and system levels. This review offers a detailed survey of radiation effects in FPGAs and looks at the latest methods used to reduce radiation impact in space applications. The paper covers radiation-hardened FPGA technologies, circuit-level hardening techniques, fault-tolerant design strategies like Triple Modular Redundancy (TMR) and configuration scrubbing, along with their use in actual space missions. It also discusses new trends such as adaptive fault tolerance, artificial intelligence-based onboard processing, and next-generation radiation-tolerant FPGA designs. By gathering recent developments and pointing out existing research gaps, this review gives researchers and engineers a clear understanding of radiation-hardened FPGA design practices and future paths for reliable reconfigurable computing in space settings.