A 122 dB gain fully differential op-amp with a rail-to-rail output and novel offset compensation scheme

Purpose This paper aims to design and analyze a novel, very high gain, fully differential operational amplifier (op-amp). The design also addresses mismatch-induced offset in high-gain amplifiers with a novel static offset compensation circuit. Design/methodology/approach The op-amp incorporates a two-stage architecture comprising a high-gain stage and a moderate gain buffer stage. The high-gain stage features an independently biased input stage followed by a gain boosted cascode stage. The independent bias architecture helps to minimize the bias limitations placed on the high-gain stage. A class AB-biased push–pull output stage delivers the rail-to-rail output voltage swing. A miller compensation network and common-mode feedback circuit are also included. The integrated offset compensation offers a simple yet effective strategy for handling offsets, using minimal additional resources. The op-amp was designed in a commercial 180 nm 5 V CMOS process and can drive large capacitive loads up to 80 pF. Findings This paper presents the detailed design, analysis and simulation results of the proposed amplifier. Simulations show that the open loop gain, unity gain bandwidth and the phase margin (PM) of the amplifier while driving an 80 pF load are around 122 dB, 4.6 MHz and 62o, respectively. The op-amp operates across a wide temperature range of 0–100°C. Originality/value The op-amp delivers stable performance and exceptionally high gain across varying temperature and process conditions. The design introduces additional improvements over conventional architectures, including the integration of an independent bias-gm stage and pseudo-differential gain boosting. The proposed offset compensation circuit corrects mismatch-induced offset, common in high gain amplifiers, with minimal design overhead. A comprehensive noise analysis and stability analysis of the designed amplifier is also presented.