Degradation Characteristic of Transfer-Molded SiC Power Modules with Copper-Based Insulated Metal Substrate (IMS) under Thermal Shock Condition

Electrical and thermal degradation and interfacial microstructural evolution were investigated in a transfer-molded 1200 V, 75 A class SiC power module with an insulated metal substrate (IMS) using a thermal shock test (TST). The TST was performed at ?40-150 ˚C for 1,000 cycles, and the thermal resistance (R<sub>th</sub>), on-resistance (R<sub>DS(on)</sub>), and forward voltage (V<sub>F</sub>) were measured before and after the TST. In addition, the interfacial degradation behavior was evaluated through scanning acoustic tomography (SAT) and cross-sectional scanning electron microscopy (SEM) analysis. After the TST, the R<sub>DS(on)</sub> increased from 21.80 mΩ to 26.19 mΩ, corresponding to an increase of approximately 20.1%, while the VF increased from 4.43 V to 4.60 V, corresponding to an increase of approximately 3.8%. Furthermore, the R<sub>th</sub> increased from 0.5126 K/W to 0.5495 K/W, corresponding to an increase of approximately 7.20%. SAT analysis showed localized abnormal signals in some SiC MOSFET die joint regions, while cross-sectional analysis confirmed the formation of (Cu,Ni)<sub>6</sub>Sn<sub>5</sub> intermetallic compound (IMC) at the SiC MOSFET/solder interface and Cu<sub>6</sub>Sn<sub>5</sub> IMC at the solder/substrate interface, where cracks were observed along both IMC interfaces. These results indicate that TST-induced degradation occurred mainly at the interfacial IMC layers and that the resulting interfacial cracks were responsible for the increases in R<sub>th</sub> and R<sub>DS(on)</sub>.