Outstanding figure-of-merit in SOI-LDMOSFET by a surface groove technique

A novel technique is presented to enhance the electrical characteristics of Silicon-On-Insulator Lateral Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistors (SOI-LDMOSFETs). The concentration of the electric field in localized regions of the drift area increases susceptibility to breakdown. The proposed technique employs a surface groove within the drift region to redistribute the electric field lines uniformly, thereby reducing peak field intensity. Figure-of-merit analysis reveals a 70% improvement with the Surface Groove SOI-LDMOSFET (SG-SOI-LDMOSFET), achieving 4.8 MW/cm 2 . These enhancements are demonstrated using the 2D device simulations. The technique improves device performance significantly without adding complexity to the fabrication process.

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Publication Details

Journal
Scientific Reports
Published
2026-06-30
DOI
https://doi.org/10.1038/s41598-026-59341-w
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
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article

Outstanding figure-of-merit in SOI-LDMOSFET by a surface groove technique

Abdollah Abbasi, Ali A. Orouji, Ali Shokouhi Shoormasti
Scientific Reports
Advancements in Semiconductor Devices and Circuit Design
article

Outstanding figure-of-merit in SOI-LDMOSFET by a surface groove technique

Abdollah Abbasi, Ali A. Orouji, Ali Shokouhi Shoormasti
article en

Abstract

A novel technique is presented to enhance the electrical characteristics of Silicon-On-Insulator Lateral Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistors (SOI-LDMOSFETs). The concentration of the electric field in localized regions of the drift area increases susceptibility to breakdown. The proposed technique employs a surface groove within the drift region to redistribute the electric field lines uniformly, thereby reducing peak field intensity. Figure-of-merit analysis reveals a 70% improvement with the Surface Groove SOI-LDMOSFET (SG-SOI-LDMOSFET), achieving 4.8 MW/cm 2 . These enhancements are demonstrated using the 2D device simulations. The technique improves device performance significantly without adding complexity to the fabrication process.

Scientific Reports
Semnan University (IR)
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Advancements in Semiconductor Devices and Circuit Design
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