Quantitative Analysis of Sampling Conditions in Continuous-Time Signals toward High-Speed Physical Reservoir Computing Systems

This paper presents a quantitative analysis of analog-to-digital conversion (ADC) architectures for enabling high-speed physical reservoir computing (PRC) through spatial parallelization. In PRC systems that process broadband signals, such as optical reservoirs, the limited temporal resolution of individual conversion interfaces constitutes a critical hardware bottleneck. To overcome this limitation, this study investigates a strategy that compensates for restricted sampling rates by spatially distributing multiple low-speed conversion units and examines its impact on reservoir dynamics using 1-bit ΔΣ modulators. First, the influence of the oversampling ratio (OSR) on computational accuracy is quantified to determine the OSR required to approach the performance of an ideal analog baseline. Furthermore, the concept of time-space equivalence is demonstrated, wherein increasing the spatial density of parallel modulators effectively substitutes for high temporal resolution. Simulation results show that massive parallelization of low-cost, low-speed conversion units can achieve signal restoration accuracy comparable to that of expensive high-speed serial ADCs. These findings provide practical design guidelines for overcoming electronic bottlenecks in PRC through strategic utilization of spatial resources, thereby enabling high-performance processing under realistic hardware constraints.