Security Trade-offs in Memristive In-Memory Computing
Memristors as a fourth fundamental circuit element has emerged as a promisingsolution for energy efficient neural network interface and hardware cryptographywhich exploits variability, non-volatility, analog granularity, and crossbar densityof memristive devices. These same physical properties introduce an underexploredattack surface that is different from the conventional CMOS-based systems. Thispaper presents a structured literature review of security trade-offs in memristivein-memory computing architectures. We review the usage of memristors in PhysicalUnclonable Functions (PUFs) and True Random Number Generators (TRNGs),analog encryption schemes, and logic-in-memory (LIM) cryptographic circuits. Wefurther analyze the vulnerability studies including side-channel attacks on MAGIC-based LIM, fault injection (FI) attacks, power-based reverse engineering attacks onspiking neural networks and model theft in NN accelerators architecture such asPRIME. We also discuss the trade-offs of countermeasures such as power-balancedhiding, weight transformation, model encryption, and fingerprint embedding. Thereare 2 key findings across the reviewed works: (i) the absence of a unified defenceframework capable of addressing side channel leakage, fault injection, white-boxextraction, and learning attacks without incurring prohibitive hardware, energy, orendurance overheads; (ii) an identified open research challenge regarding the lack offabricated hardware validation for the countermeasures proposed.
Authors
- Bhubon Chandra Mech (ORCID: https://orcid.org/0000-0002-4406-6007)
- Shyam Sundar Kushana
Institutions
- Defence Institute of Advanced Technology (IN)
- Society for Electronic Transactions and Security
Publication Details
- Journal
- Zenodo (CERN European Organization for Nuclear Research)
- Published
- 2026-06-29
- DOI
- https://doi.org/10.5281/zenodo.21037114
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- preprint