An investigation into the application of artificial intelligence for false reject screening in advanced System-on-Chip final testing
This study adopts a practical perspective to integrate artificial intelligence techniques into the development of a predictive framework for screening false rejects in advanced System-on-Chip (SoC) final testing. The dataset was collected from a Taiwanese semiconductor company, comprising 53,226 test samples of SoCs packaged with TFBGA 591. To enhance model performance, particular attention was given to feature engineering, including the selection, transformation, and extraction of raw test data, in order to identify representative variables for predicting potential defective units. Three supervised learning approaches – logistic regression, random forest, and neural networks – were employed to construct predictive models, with a specific focus on the first-test (FT) stage to reduce retest costs and improve production efficiency. Empirical results indicate that the random forest model outperformed the others in the false reject detection task, achieving an F1-score of 92.94% and a recall of 96.77% for the false reject class, significantly outperforming the baseline methods. These findings confirm the feasibility of deploying the random forest model in practical mass production environments.
Authors
- Chih-Chen Hsu (ORCID: https://orcid.org/0009-0008-5036-2372)
- Ting-Fu Chen (ORCID: https://orcid.org/0000-0001-8671-8598)
- Cheng‐Chieh Yu
- Sheng-Guan Hong
Institutions
- National Taichung University of Science and Technology (TW)
- National Central University (TW)
- Analysis and Testing Centre (CN)
- National Chengchi University (TW)
Publication Details
- Journal
- Journal of the Chinese Institute of Engineers
- Published
- 2026-06-26
- DOI
- https://doi.org/10.1080/02533839.2026.2690233
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Science and Technology Council