An investigation into the application of artificial intelligence for false reject screening in advanced System-on-Chip final testing

This study adopts a practical perspective to integrate artificial intelligence techniques into the development of a predictive framework for screening false rejects in advanced System-on-Chip (SoC) final testing. The dataset was collected from a Taiwanese semiconductor company, comprising 53,226 test samples of SoCs packaged with TFBGA 591. To enhance model performance, particular attention was given to feature engineering, including the selection, transformation, and extraction of raw test data, in order to identify representative variables for predicting potential defective units. Three supervised learning approaches – logistic regression, random forest, and neural networks – were employed to construct predictive models, with a specific focus on the first-test (FT) stage to reduce retest costs and improve production efficiency. Empirical results indicate that the random forest model outperformed the others in the false reject detection task, achieving an F1-score of 92.94% and a recall of 96.77% for the false reject class, significantly outperforming the baseline methods. These findings confirm the feasibility of deploying the random forest model in practical mass production environments.

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Publication Details

Journal
Journal of the Chinese Institute of Engineers
Published
2026-06-26
DOI
https://doi.org/10.1080/02533839.2026.2690233
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
0.00

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article

An investigation into the application of artificial intelligence for false reject screening in advanced System-on-Chip final testing

Chih-Chen Hsu, Ting-Fu Chen, Cheng‐Chieh Yu, Sheng-Guan Hong
Journal of the Chinese Institute of Engineers
VLSI and Analog Circuit Testing
article

An investigation into the application of artificial intelligence for false reject screening in advanced System-on-Chip final testing

Chih-Chen Hsu, Ting-Fu Chen, Cheng‐Chieh Yu, Sheng-Guan Hong
article en

Abstract

This study adopts a practical perspective to integrate artificial intelligence techniques into the development of a predictive framework for screening false rejects in advanced System-on-Chip (SoC) final testing. The dataset was collected from a Taiwanese semiconductor company, comprising 53,226 test samples of SoCs packaged with TFBGA 591. To enhance model performance, particular attention was given to feature engineering, including the selection, transformation, and extraction of raw test data, in order to identify representative variables for predicting potential defective units. Three supervised learning approaches – logistic regression, random forest, and neural networks – were employed to construct predictive models, with a specific focus on the first-test (FT) stage to reduce retest costs and improve production efficiency. Empirical results indicate that the random forest model outperformed the others in the false reject detection task, achieving an F1-score of 92.94% and a recall of 96.77% for the false reject class, significantly outperforming the baseline methods. These findings confirm the feasibility of deploying the random forest model in practical mass production environments.

Journal of the Chinese Institute of Engineers
National Taichung University of Science and Technology (TW), National Central University (TW), Analysis and Testing Centre (CN), National Chengchi University (TW)
National Science and Technology Council
Openalex Percentile: Top 4%
VLSI and Analog Circuit Testing
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An investigation into the application of artificial intelligence for false reject screening in advanced System-on-Chip final testing — Chih-Chen Hsu, Ting-Fu Chen, et al. · Journal of the Chinese Institute of Engineers (2026) | TGRS Research Map | TGRS