Comparision of RISC and CISC architectures
This research paper presents a comparative analysis of Reduced Instruction Set Computer (RISC) and Complex Instruction Set Computer (CISC) architectures. The study examines architectural design, instruction execution, performance efficiency, memory utilization, power consumption, and real-world applications. Modern processor implementations are discussed to evaluate how both architectures address contemporary computing requirements. The findings highlight strengths, limitations, and suitable application areas for each architecture.
Authors
- Reham Akhund
- Asawer Yaseen
- Bakhtawar Memon
- Rida Batool
- Rania Shaikh
Institutions
- Shaheed Zulfiqar Ali Bhutto Institute of Science and Technology (PK)
Publication Details
- Journal
- Zenodo (CERN European Organization for Nuclear Research)
- Published
- 2026-06-25
- DOI
- https://doi.org/10.5281/zenodo.20849162
- Primary Topic
- Parallel Computing and Optimization Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00