Comparision of RISC and CISC architectures

This research paper presents a comparative analysis of Reduced Instruction Set Computer (RISC) and Complex Instruction Set Computer (CISC) architectures. The study examines architectural design, instruction execution, performance efficiency, memory utilization, power consumption, and real-world applications. Modern processor implementations are discussed to evaluate how both architectures address contemporary computing requirements. The findings highlight strengths, limitations, and suitable application areas for each architecture.

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2026-06-25
DOI
https://doi.org/10.5281/zenodo.20849162
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
Field-Weighted Citation Impact
0.00
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article

Comparision of RISC and CISC architectures

Reham Akhund, Asawer Yaseen, Bakhtawar Memon, Rida Batool et al.
Zenodo (CERN European Organization for Nuclear Research)
Parallel Computing and Optimization Techniques
article

Comparision of RISC and CISC architectures

Reham Akhund, Asawer Yaseen, Bakhtawar Memon, Rida Batool, Rania Shaikh
article en

Abstract

This research paper presents a comparative analysis of Reduced Instruction Set Computer (RISC) and Complex Instruction Set Computer (CISC) architectures. The study examines architectural design, instruction execution, performance efficiency, memory utilization, power consumption, and real-world applications. Modern processor implementations are discussed to evaluate how both architectures address contemporary computing requirements. The findings highlight strengths, limitations, and suitable application areas for each architecture.

Zenodo (CERN European Organization for Nuclear Research)
Shaheed Zulfiqar Ali Bhutto Institute of Science and Technology (PK)
Affordable and clean energy
Openalex Percentile: Top 4%
Parallel Computing and Optimization Techniques
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