A 140 GHz Two-Channel Transmitter in 40 nm Bulk CMOS

This paper presents a 140 GHz two-channel transmitter in 40 nm bulk CMOS technology for D-band wireless communication systems. The transmitter employs a direct upconversion architecture with IQ Gilbert cell mixers and a shared ×9 frequency multiplier for local oscillator (LO) generation. The Lange coupler generates quadrature LO signals for I and Q paths, while the two-way four-stage differential power amplifier with cascade topology provides high output power. On-wafer measurement at 140 GHz LO frequency demonstrates a 9.9 dB conversion gain with a 5.5–6.1 GHz 3 dB bandwidth. The measured saturated output power is 10.1 dBm with an output 1 dB compression point of 6.5 dBm. The IQ imbalance remains within 2 dB across the 3 dB bandwidth. The fabricated transmitter occupies a chip area of 1.68 mm2 and consumes 435 mW from a 1 V supply. The power density of 6.09 mW/mm2 is the highest among reported CMOS-based D-band transmitters. The dual-channel architecture with shared LO generation enables MIMO transmission, spatial multiplexing, and diversity techniques while maintaining compact size and competitive power efficiency for high data rate wireless applications in the D-band frequency range.

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Publication Details

Journal
Electronics
Published
2026-05-28
DOI
https://doi.org/10.3390/electronics15112349
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A 140 GHz Two-Channel Transmitter in 40 nm Bulk CMOS

Munkyo Seo, 김재관, C S Lee, Junkyu Lee
Electronics
Radio Frequency Integrated Circuit Design
article

A 140 GHz Two-Channel Transmitter in 40 nm Bulk CMOS

Munkyo Seo, 김재관, C S Lee, Junkyu Lee
article en

Abstract

This paper presents a 140 GHz two-channel transmitter in 40 nm bulk CMOS technology for D-band wireless communication systems. The transmitter employs a direct upconversion architecture with IQ Gilbert cell mixers and a shared ×9 frequency multiplier for local oscillator (LO) generation. The Lange coupler generates quadrature LO signals for I and Q paths, while the two-way four-stage differential power amplifier with cascade topology provides high output power. On-wafer measurement at 140 GHz LO frequency demonstrates a 9.9 dB conversion gain with a 5.5–6.1 GHz 3 dB bandwidth. The measured saturated output power is 10.1 dBm with an output 1 dB compression point of 6.5 dBm. The IQ imbalance remains within 2 dB across the 3 dB bandwidth. The fabricated transmitter occupies a chip area of 1.68 mm2 and consumes 435 mW from a 1 V supply. The power density of 6.09 mW/mm2 is the highest among reported CMOS-based D-band transmitters. The dual-channel architecture with shared LO generation enables MIMO transmission, spatial multiplexing, and diversity techniques while maintaining compact size and competitive power efficiency for high data rate wireless applications in the D-band frequency range.

ElectronicsVol. 15(11)
Samsung (South Korea) (KR), Sungkyunkwan University (KR)
Affordable and clean energy
Openalex Percentile: Top 8%
Radio Frequency Integrated Circuit Design
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