Logic Functionality and Circuit Design of In <sub>2</sub> Se <sub>3</sub> ‐Based Split‐Gate Ferroelectric Field‐Effect Transistor for Zero‐Trust Applications
ABSTRACT Van der Waals ferroelectric materials are emerging as key building blocks for future logic devices and integrated circuits. Among them, α‐In 2 Se 3 offers a unique combination of robust room temperature ferroelectricity and semiconducting behavior. Here, we present α‐In 2 Se 3 ‐based ferroelectric semiconductor field‐effect transistors (FeS‐FETs) with a split‐gate architecture that enables multifunctional logic operations. Operating in the high equivalent oxide thickness (EOT) regime, the devices exhibit a clockwise transfer hysteresis with a wide memory window and an on/off ratio above 10 4 . The split‐gate design enables independent control over channel segments, allowing implementation of volatile NAND logic and reconfigurable Fe‐NAND/Fe‐NOR operations. In addition, multilevel conductance states and programmable threshold‐voltage shifts are demonstrated, further extending the device functionality toward multi‐valued and analog computing. Circuit simulations using a FeS‐FET equivalent model show that two devices are connected in parallel, and all elementary Boolean logic functions can be achieved. Notably, the programmed states retain for ∼10 2 s, a balanced retention window ideally suited for applications in security‐focused “zero‐trust” environments where temporary data storage and self‐erasure are desired.
Authors
- Abdelkarim Ouerghi (ORCID: https://orcid.org/0000-0002-1898-2765)
- Jean‐François Dayen (ORCID: https://orcid.org/0000-0001-5625-9263)
- Aymen Mahmoudi (ORCID: https://orcid.org/0000-0003-3951-6832)
- Ian O’Connor (ORCID: https://orcid.org/0000-0002-6238-9600)
- Bernard Doudin (ORCID: https://orcid.org/0000-0002-0657-4780)
- S. Masood
- Ankita Ram
- Alexei Gruverman
- Takashi Taniguchi
- Cédric Marchand
- Kenji Watanabe
Institutions
- École Centrale de Lyon (FR)
- University of Nebraska–Lincoln (US)
- Centre National de la Recherche Scientifique (FR)
- National Institute for Materials Science (JP)
- Centre de Nanosciences et de Nanotechnologies (FR)
- Université de Strasbourg (FR)
Publication Details
- Journal
- Advanced Electronic Materials
- Published
- 2026-05-27
- DOI
- https://doi.org/10.1002/aelm.202500871
- Primary Topic
- Ferroelectric and Negative Capacitance Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Science Foundation
- Agence Nationale de la Recherche
- Japan Society for the Promotion of Science
- HORIZON EUROPE European Innovation Council