XSeal: Microarchitectural Optimization of SIMD-Resident Genomic Sampling Pipelines

While k-mer sampling is fundamental to bioinformatics, integrating these algorithms into high-throughput pipelines presents scaling challenges on modern processors. We present XSeal, a C++20 library that accelerates genomic sampling using stateless SIMD hashing and a Vector-Stream-Buffer (VSB) pipeline. On page-cache warm memory-mapped inputs, XSeal achieves up to 1.74 Gbp/s sustained hot-memory scanning throughput under L2-cache optimal staging (excluding explicit hash materialization)—a 1.77× to 2.10× speedup over a native-compiled SIMD baseline. Hardware profiling exposes a micro-architectural trade-off we term Topology-Induced Throughput Inversion: under the tested Zen 3 AVX2 workloads, a stateless O(W ) SIMD architecture outperforms the O(1) rolling hash baseline by substantially reducing the executed instruction density from 21.5–23.3 to 7.8–9.3 insn/bp. Furthermore, register-bound SIMD topologies outperform asymptotically optimal sparse-tables by avoiding Store-to-Load Forwarding (STLF) stalls. Integrated as a zero-copy frontend for minimap2, XSeal accelerates data ingestion and sketching by 44.7×. Furthermore, its contiguous memory-staging architecture significantly improves spatial locality for downstream indexing phases, yielding a 2.27× overall end-to-end speedup. Source code is available at: https://github.com/hanrai/xseal