Artificial neural networks in semiconductor device compact modeling: A review
This review examines the use of artificial neural networks (ANNs) in the development of compact models for emerging devices. As new device technologies emerge, there is a critical need for compact models that are not only accurate and computationally efficient, but also sufficiently simple and physically consistent with support meaningful circuit-level simulation and design. We discuss how ANNs can be employed to address this challenge, emphasizing their potential to complement or extend traditional compact modeling approaches. The paper also outlines prospective research directions, focusing on the integration of machine learning techniques—particularly neural network architectures and training strategies—within the compact modeling framework. Finally, key methodological aspects are addressed, including the selection of training datasets, definition of model parameters, and relevant performance metrics, to guide the development of robust and interpretable models.
Authors
- Minsun Cho (ORCID: https://orcid.org/0000-0003-0962-420X)
- O‐Joun Lee (ORCID: https://orcid.org/0000-0001-8921-5443)
- Sungyeop Jung (ORCID: https://orcid.org/0000-0003-2669-1797)
- Chang-Hyun Kim (ORCID: https://orcid.org/0000-0002-7112-6335)
- Deokho Jang (ORCID: https://orcid.org/0009-0004-1472-2642)
Institutions
- University of Ottawa (CA)
- Sejong University (KR)
- Sejong Institute (KR)
- Catholic University of Korea (KR)
Publication Details
- Journal
- Applied Physics Reviews
- Published
- 2026-05-22
- DOI
- https://doi.org/10.1063/5.0333553
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Korea Foundation for Women In Science, Engineering and Technology
- Korea University
- National Research Foundation of Korea
- Korea Evaluation Institute of Industrial Technology