Electrically Reconfigurable Floating Gate Optoelectronic Synaptic Pixels for In-sensor Convolutional Image Feature Extraction with Built-in Contrast Enhancement
) as the photoactive channel and bilayer graphene as the floating gate, enabling high optical responsivity even under low-light conditions. The device exhibits a superlinear photoresponse that intrinsically enhances image contrast during sensing. Importantly, the device supports low-voltage, circuit-friendly analog conductance modulation through fully electrical programming, eliminating the need for optical potentiation and simplifying array implementation. The codesigned architecture encodes 4-bit light-intensity-dependent information (16 levels) with strong robustness against cycle-to-cycle and device-to-device variations. Furthermore, we demonstrate in-pixel convolutional operations, including edge detection, image sharpening, and Gaussian blurring. These results highlight the computational versatility of the FG-OS array and establish a scalable pathway toward in-sensor processing and single-layer CNN architectures for intelligent vision systems.
Authors
- Shahin Hashemkhani (ORCID: https://orcid.org/0000-0003-3629-6424)
- Joan Marie Redwing (ORCID: https://orcid.org/0000-0002-7906-452X)
- Arijit Sarkar (ORCID: https://orcid.org/0000-0001-5434-8545)
- J T Chen
- C H Chen
- Tania Roy (ORCID: https://orcid.org/0000-0003-1131-8068)
- Rajkumar Kubendran
- Md Sazzadur Rahman (ORCID: https://orcid.org/0000-0003-2774-8206)
Institutions
- Pennsylvania State University (US)
- University of Pittsburgh (US)
- Duke University (US)
- Crystal Research (United States) (US)
Publication Details
- Journal
- ACS Nano
- Published
- 2026-05-11
- DOI
- https://doi.org/10.1021/acsnano.6c03713
- Primary Topic
- CCD and CMOS Imaging Sensors
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Science Foundation Graduate Research Fellowship Program