A Hybrid Computational Approach for Predicting Carrier Mobility of Nano-MOSFETs

• Calculation of carrier mobility in Nano-MOSFETs under non-uniform strain. • Prediction of the critical size for carrier mobility failure in Nano-MOSFETs. • Integration of first-principles calculations with finite element simulation. Strain engineering serves as an efficient approach to enhance carrier mobility in the scaling of Nano-MOSFETs. However, the current first‑principles calculations of mobility in uniaxially strained devices often rely on the uniform strain approximation, neglecting the actual non-uniform strain distribution within a device. This leads to deviations between the calculated and experimental values.This work proposes a combined finite element simulation and first‑principles calculation method that reproduces the non-uniform strain profile in the MOS channel. Based on deformation potential theory and Matthiessen’s rule, key scattering mechanisms were incorporated, yielding mobility results in excellent agreement with experimental data. The results showed that non‑uniform strain enhanced the carrier mobility more effectively than uniform strain, with additional improvements of 2.5% for electrons and 3.4% for holes. Using this computational approach along with IRDS projections, this work investigates the impact of the channel and gate oxide interface on the mobility and determines the critical dimensions for mobility degradation in three-dimensional Nano-MOSFETs. This work can be used to calculate the fundamental scaling limits of Moore’s law in 3D devices, and it provides a theoretical foundation for the design of future “More than Moore” devices.

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Publication Details

Journal
Results in Engineering
Published
2026-05-01
DOI
https://doi.org/10.1016/j.rineng.2026.110938
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

A Hybrid Computational Approach for Predicting Carrier Mobility of Nano-MOSFETs

Wenhai Lu, Guanyu Wang, Danying Wang, Chunyu Zhou
Results in Engineering
Advancements in Semiconductor Devices and Circuit Design
article

A Hybrid Computational Approach for Predicting Carrier Mobility of Nano-MOSFETs

Wenhai Lu, Guanyu Wang, Danying Wang, Chunyu Zhou
article en

Abstract

• Calculation of carrier mobility in Nano-MOSFETs under non-uniform strain. • Prediction of the critical size for carrier mobility failure in Nano-MOSFETs. • Integration of first-principles calculations with finite element simulation. Strain engineering serves as an efficient approach to enhance carrier mobility in the scaling of Nano-MOSFETs. However, the current first‑principles calculations of mobility in uniaxially strained devices often rely on the uniform strain approximation, neglecting the actual non-uniform strain distribution within a device. This leads to deviations between the calculated and experimental values.This work proposes a combined finite element simulation and first‑principles calculation method that reproduces the non-uniform strain profile in the MOS channel. Based on deformation potential theory and Matthiessen’s rule, key scattering mechanisms were incorporated, yielding mobility results in excellent agreement with experimental data. The results showed that non‑uniform strain enhanced the carrier mobility more effectively than uniform strain, with additional improvements of 2.5% for electrons and 3.4% for holes. Using this computational approach along with IRDS projections, this work investigates the impact of the channel and gate oxide interface on the mobility and determines the critical dimensions for mobility degradation in three-dimensional Nano-MOSFETs. This work can be used to calculate the fundamental scaling limits of Moore’s law in 3D devices, and it provides a theoretical foundation for the design of future “More than Moore” devices.

Results in Engineering
Chongqing University of Posts and Telecommunications (CN), Yanshan University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 8%
Advancements in Semiconductor Devices and Circuit Design
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