Bridging hardware and software analysis with Btor2C: a word-level-circuit-to-C translator

Abstract Across the broad research field concerned with analyzing computing systems, algorithms and tools revolve around the modeling languages used to describe the systems, hindering their applications to similar problems of systems in other modeling languages. For example, the research communities for formal verification and testing of hardware and software share common theoretical foundations and solving methods, including symbolic encoding, satisfiability solving, and abstraction refinement. Nevertheless, it requires significant effort for one community to benefit from the advancements of the other, as analyzers assume different modeling languages for input instances. To bridge the gap between hardware and software analysis, we propose Btor2C , a translator from word-level sequential circuits in the Btor2 language to C programs. We choose the Btor2 language as frontend because its simple syntax and bit-precise semantics make it a suitable intermediate representation for analysis purposes. Using Btor2C , we translate Btor2 circuits from the Hardware Model Checking Competitions into C programs and analyze them using tools from the Intl. Competitions on Software Verification and Testing. Our results show that software analyzers can complement hardware model checkers for enhanced quality assurance: Prominently, the software verifier Cbmc (with Btor2C for preprocessing) found more bugs than the best hardware model checkers ABC and AVR in our experiment.

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Publication Details

Journal
International Journal on Software Tools for Technology Transfer
Published
2026-04-30
DOI
https://doi.org/10.1007/s10009-026-00847-z
Primary Topic
Formal Methods in Verification
Type
article
Field-Weighted Citation Impact
0.00

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article

Bridging hardware and software analysis with Btor2C: a word-level-circuit-to-C translator

Po-Chun Chien, Nian-Ze Lee, Salih Ates, Dirk Beyer
International Journal on Software Tools for Technology Transfer
Formal Methods in Verification
article

Bridging hardware and software analysis with Btor2C: a word-level-circuit-to-C translator

Po-Chun Chien, Nian-Ze Lee, Salih Ates, Dirk Beyer
article en

Abstract

Abstract Across the broad research field concerned with analyzing computing systems, algorithms and tools revolve around the modeling languages used to describe the systems, hindering their applications to similar problems of systems in other modeling languages. For example, the research communities for formal verification and testing of hardware and software share common theoretical foundations and solving methods, including symbolic encoding, satisfiability solving, and abstraction refinement. Nevertheless, it requires significant effort for one community to benefit from the advancements of the other, as analyzers assume different modeling languages for input instances. To bridge the gap between hardware and software analysis, we propose Btor2C , a translator from word-level sequential circuits in the Btor2 language to C programs. We choose the Btor2 language as frontend because its simple syntax and bit-precise semantics make it a suitable intermediate representation for analysis purposes. Using Btor2C , we translate Btor2 circuits from the Hardware Model Checking Competitions into C programs and analyze them using tools from the Intl. Competitions on Software Verification and Testing. Our results show that software analyzers can complement hardware model checkers for enhanced quality assurance: Prominently, the software verifier Cbmc (with Btor2C for preprocessing) found more bugs than the best hardware model checkers ABC and AVR in our experiment.

International Journal on Software Tools for Technology Transfer
Ludwig-Maximilians-Universität München
Openalex Percentile: Top 5%
Formal Methods in Verification
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Bridging hardware and software analysis with Btor2C: a word-level-circuit-to-C translator — Po-Chun Chien, Nian-Ze Lee, et al. · International Journal on Software Tools for Technology Transfer (2026) | TGRS Research Map | TGRS