Technology Computer‐Aided Design Analysis of the Impact of Impurities and Traps in the AlGaN Barrier of GaN HEMTs on the <i>C–V</i> Characteristics of Metal–Insulator–Semiconductor Structures

The interface of the AlGaN barrier and the traps and impurities within the barrier significantly affect the characteristics of GaN devices. One evaluation method is C–V measurement using a metal–insulator–semiconductor structure with a gate insulator, gate electrode, and drain electrode, where the waveform changes due to the influence of traps in the gate insulator, AlGaN barrier, and their interface. In this study, we incorporated impurities in the AlGaN barrier obtained from secondary ion mass spectrometry analysis and electron/hole traps estimated from C–V waveforms into a Technology Computer‐Aided Design model to reproduce the measured C–V characteristics and analyze the underlying mechanisms. It was found that the reduction in maximum capacitance is caused by electron traps at the gate insulator/AlGaN interface and silicon in the AlGaN barrier, and that the difference in hysteresis curves observed during two consecutive gate voltage sweeps can be reproduced by introducing two types of electron traps with different energy levels at the interface.

Authors

Institutions

Publication Details

Journal
physica status solidi (a)
Published
2026-04-29
DOI
https://doi.org/10.1002/pssa.70372
Primary Topic
GaN-based semiconductor devices and materials
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Technology Computer‐Aided Design Analysis of the Impact of Impurities and Traps in the AlGaN Barrier of GaN HEMTs on the C–V Characteristics of Metal–Insulator–Semiconductor Structures

Ryohei Nega, Kosuke Miura, Takeshi Suwa
physica status solidi (a)
GaN-based semiconductor devices and materials
article

Technology Computer‐Aided Design Analysis of the Impact of Impurities and Traps in the AlGaN Barrier of GaN HEMTs on the C–V Characteristics of Metal–Insulator–Semiconductor Structures

Ryohei Nega, Kosuke Miura, Takeshi Suwa
article en

Abstract

The interface of the AlGaN barrier and the traps and impurities within the barrier significantly affect the characteristics of GaN devices. One evaluation method is C–V measurement using a metal–insulator–semiconductor structure with a gate insulator, gate electrode, and drain electrode, where the waveform changes due to the influence of traps in the gate insulator, AlGaN barrier, and their interface. In this study, we incorporated impurities in the AlGaN barrier obtained from secondary ion mass spectrometry analysis and electron/hole traps estimated from C–V waveforms into a Technology Computer‐Aided Design model to reproduce the measured C–V characteristics and analyze the underlying mechanisms. It was found that the reduction in maximum capacitance is caused by electron traps at the gate insulator/AlGaN interface and silicon in the AlGaN barrier, and that the difference in hysteresis curves observed during two consecutive gate voltage sweeps can be reproduced by introducing two types of electron traps with different energy levels at the interface.

physica status solidi (a)Vol. 223(9)
Toshiba (Japan) (JP)
Openalex Percentile: Top 9%
GaN-based semiconductor devices and materials
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.