An Error-Compensated Configurable Approximate Recursive Multiplier for Energy-Efficient Image Processing and CNN Inference

The growing demand for energy-efficient arithmetic circuits, particularly for edge-based image processing and deep learning inference, has sustained research interest in approximate computing. However, existing approximate recursive multipliers often suffer from error accumulation in recursive structures and limited flexibility in balancing accuracy and hardware efficiency. To address these limitations, this paper proposes a configurable approximate recursive multiplier based on an Error-Compensated Recursive Structure (ECRS). The design integrates partial carry truncation with a novel w3_2 compressor for localized error reduction. Meanwhile, the ECRS dynamically optimizes compensation columns to suppress error propagation in higher-order multiplications, with tunable precision achieved via optimized 4 × 4 building blocks. Synthesized in TSMC 28 nm CMOS, the high-precision configuration (W8_1) reduces area, power, and delay by 11.87%, 12.71% and 20.25% versus the exact multiplier, while the low-power configuration (W8_6ct4) achieves over 58% area reduction. In Gaussian image smoothing, W8_1 maintains a PSNR of 54.73 dB and an SSIM of 99.93%. In quantized CNN inference, W8_1 achieves accuracy close to the exact baseline across a range of models and datasets, with most tested configurations exhibiting a loss of 0.2% or less and only a few exceptions where architectural sensitivity leads to slightly larger degradation.