Implementation of CMOS Min-Max Circuit in 0.13um
In this paper the outline and reproduction of a multi-input fluffy MIN and MAX circuits in light of another methodology taking simple plan points of interest, for example, low kick the bucket zone, fast, and effortlessness is considered. Particular current-mode circuits to acquire the base and greatest of N simple sources of info are depicted. The acknowledgment technique is reasonable for manufacture utilizing CMOS innovation. The circuit demonstrates the value of having high exactness and a substantial powerful range. Its activity is examined and outlined with recreation results. This multi-input fluffy MIN and MAX circuits were manufactured inside 130 nm BSIM3V3 CMOS innovation.
Authors
- Ridouane Hamdaouy
- Mostapha boussetta
- Khadija Slaoui (ORCID: https://orcid.org/0009-0009-0924-3627)
Publication Details
- Journal
- Science Publishing Corporation Inc. - International Journal of Engineering & Technology
- Published
- 2026-04-27
- DOI
- https://doi.org/10.14419/ijet.v7i3.19.19897
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.00