Silicon‐Embedded Multifunctional Heterogeneous Integration for Miniaturized Photoplethysmography Detection Devices

The multifunctional integration of chips with high flexibility and scalable manufacturing is crucial for enhancing chip performance, reducing chip size, and simplifying chip design. However, balancing volume, cost, flexibility, and functionality using traditional heterogeneous integration methods is challenging. To overcome this, a silicon-embedded multifunctional heterogeneous integration method based on top-down engineering was proposed. As a representative application, a wearable photoplethysmography detection system was demonstrated. The functional modules of this system required for sensing, acquisition, and processing were embedded and reconnected on the same silicon interposer to form a new integrated chip. A thermal-aware floorplan optimization algorithm was employed to improve the thermal performance of the integrated chip, achieving a 6.5°C reduction in the peak temperature. The chip accurately detected physiological changes across different frequency ranges following physical activity performed at varying intensities by test participants. Compared to traditional integration methods, the proposed method achieved a 46% and 94.7% reduction in power consumption and volume, respectively, and a remarkable 90% increase in functional unit density. This technology promotes rapid, flexible, and low-cost manufacturing of multifunctional chips toward the development of next-generation multifunctional, low-power, miniaturized electronic devices.