Surface Plasmon Based Surface Metrology for Cu Cylinders in a SiO2 Film

To manufacture next-generation semiconductor chips with cutting-edge performance, vertically stacked architectures are increasingly employed. Such stacking is realized through hybrid bonding of Cu-SiO2 structures composed of cylindrical Cu vias embedded in a SiO2 film. However, prior to bonding, dishing defects can arise at the faces of the vias during chemical mechanical polishing and significantly affect the reliability of the fabricated chips. Therefore, precise characterization of the surface morphology of the Cu-SiO2 structure is essential. Here, we propose a Surface Plasmon-Based Reflectometry (SPBR) method capable of characterizing the surface morphology of Cu-SiO2 array structures. When light is incident on a metal-dielectric interface, surface plasmons (SPs) can be excited, which exhibit surface-sensitive spatial near-field intensity distributions with characteristic reflectance spectra, enabling extraction of surface morphology information of the Cu-SiO2 structure. We numerically investigate the SP characteristics and resulting sensitivity of the reflectance spectra to dishing defects for Cu-SiO2 arrays with various structural and illumination parameters (e.g., pillar diameter, pitch, beam incidence angle and polarization) and observe a significant reflectance change with dishing size at the plasmonic resonance wavelength for p-polarized illumination while no plasmonic resonance is present for s-polarization. This allows rapid and quantitative determination of the dishing size by measuring the spectral reflectance ratio between p- and s-polarization after obtaining the respective reflectance spectra from well-defined reference Cu-SiO2 structures for calibration. Consequently, SPBR provides a highly scalable, rapid and inexpensive metrology approach for characterizing the morphology of Cu-SiO2 array structures for the semiconductor industry and related research fields as an alternative to traditional surface metrology methods.