Geïntegreerde on-chip stressgeoptimaliseerde dunne-film thermo-elektrische generatoren

Thermoelectric generators (TEGs) are solid-state devices that directly convert temperature gradients into electrical energy via the Seebeck effect, offering significant potential for waste-heat recovery and self-powered electronic systems. However, efficient energy harvesting at the microscale remains challenging. Planar thin-film TEGs, although compatible with standard microfabrication and on-chip integration, suffer from strong thermal coupling to the substrate. This limits the achievable internal temperature gradient across the thermoelectric elements, thereby constraining output voltage and power. Conventional approaches to enhance thermal isolation, such as bulk micromachining, nanostructuring, or the use of flexible substrates, introduce fabrication complexity and limit scalability. This thesis presents a fully integrated micro-thermoelectric generator (µTEG) platform based on stress-engineered three-dimensional thin-film architectures fabricated using standard planar processes. The approach leverages intrinsic residual stress gradients in stacked inorganic thin films. Upon release from the substrate, these stress gradients induce spontaneous out-of-plane deformation, transforming planar thermocouples into elevated 3D structures. This stress-driven self-assembly enables vertical separation between hot and cold junctions without requiring additional fabrication steps such as cavity etching or manual assembly. The resulting elevated architecture enables the development of significant internal temperature differences under realistic operating conditions. With the substrate heated to 70 °C and the cold junction exposed to ambient air, the optimized structures achieve an internal temperature difference of approximately 8 °C under passive conditions. To ensure scalability and cost-effectiveness, chromium (Cr) and nickel (Ni) were used as thermoelectric materials. Through systematic optimization of deposition and post-processing parameters, power factors of approximately 1600 µW·m⁻¹·K⁻² (Cr) and 2900 µW·m⁻¹·K⁻² (Ni) were achieved. Compared to initial devices, these improvements reduced internal resistance by approximately 26× and increased the effective Seebeck coefficient by a factor of 2.7. The optimized µTEGs deliver a power density of approximately 1.28 µW·cm⁻² under natural convection and up to 3.5 µW·cm⁻² under mild forced convection at a substrate temperature of 70 °C. These results demonstrate efficient microscale energy harvesting under realistic on-chip thermal conditions.