Memory-efficient and reliable sequence recovery algorithm for IEEE 802.1CB in time-sensitive networks

Abstract Time-Sensitive Networking (TSN) has become a key enabler for deterministic and reliable communications for safety-critical systems. Among its mechanisms, Frame Replication and Elimination for Reliability (FRER) (IEEE 802.1CB) enhances reliability by replicating frames over multiple paths and eliminating replicates at the receiver. However, the correct configuration of FRER—particularly its sequence recovery function—remains a major challenge, as improper parameter tuning can lead to unsafe behavior, including the acceptance of replicate frames or the loss of valid ones. In this paper, we address these limitations by proposing a novel recovery algorithm, Sequence-Intervals Vector Recovery Algorithm (SI-VRA), which extends the standard FRER while remaining compliant with existing specifications and reducing configuration complexity. We evaluate the proposed algorithm and conduct extensive comparisons with the standard FRER recovery algorithm across various network scenarios. Results demonstrate that SI-VRA outperforms the standard algorithm in terms of safety, while reducing memory requirements. Additionally, we present a hardware implementation on FPGA, providing insights into its practical feasibility, latency, and memory footprint.