On the equivalence between classically verifiable position verification and certified randomness
Gate-based quantum computers can accelerate computational tasks beyond classical capabilities. Random circuit sampling is a task that has experimentally demonstrated algorithmic quantum advantage on near-term devices, but its practical utility has been limited. Recently, certified randomness generation based on random circuits was demonstrated on a trapped-ion quantum computer, advancing near-term applications. In this work, we connect single-device certified randomness to classically verifiable position verification, a classical communication primitive that avoids long-distance quantum communication challenges. We present a generic compiler that converts any such certified randomness protocol into a secure classically verifiable position verification scheme, extend it to multi-round protocols, and show its equivalence to a relaxed certified randomness variant. Our near-term instantiation based on random circuit sampling demonstrates classically verifiable position verification as a practical application for near-term devices.
Authors
- Fatih Kaleoglu
- Minzhao Liu (ORCID: https://orcid.org/0000-0001-6184-8214)
- Marco Pistoia (ORCID: https://orcid.org/0000-0001-9002-1128)
- Kaushik Chakraborty (ORCID: https://orcid.org/0000-0002-6425-0418)
- Omar Amer (ORCID: https://orcid.org/0000-0002-9402-4892)
- Charles Lim
Institutions
- JPMorgan Chase & Co (United States) (US)
- University of California, Santa Barbara (US)
- Massachusetts Institute of Technology (US)
Publication Details
- Journal
- Nature Communications
- Published
- 2026-04-15
- DOI
- https://doi.org/10.1038/s41467-026-70628-4
- Primary Topic
- Quantum Computing Algorithms and Architecture
- Type
- article
- Field-Weighted Citation Impact
- 0.00