SiO _x ‐Based Probabilistic Bits Enabling Invertible Logic Gate for Cryptographic Applications

With the rapid proliferation of automotive and edge artificial intelligence applications, hardware‐level security has become a critical concern, exposing intrinsic vulnerabilities of conventional deterministic logic systems. To address these limitations, we propose a cryptographic framework based on probabilistic bits (p‐Bits) implemented with transistor‐free Ti/SiO x /Ti threshold switching (TS) devices. In a 4 × 4 cross‐point TS array, self‐oscillation emerges as output voltage spikes whose probability follows a sigmoidal dependence on input amplitude, enabling experimentally tunable randomness. The intrinsic stochastic oscillation of the TS device under voltage pulses provides controllable entropy that forms the foundation for probabilistic logic operations. Based on this functionality, OR, AND, and XOR gates are constructed using experimentally extracted p‐Bit models in MATLAB and Python. These gate configurations demonstrate invertible logic where fixed outputs constrain plausible input states, which is a drawback in conventional complementary metal–oxide semiconductor logic. Leveraging this invertibility, we design a p‐Bit full‐adder unit (pFA) capable of encryption and decryption of grayscale images within the same hardware module. A key‐update mechanism is introduced to overcome limitations associated with static key‐based encryption, improving security resilience. The pFA achieves reliable image recovery with high fidelity, establishing a versatile platform for secure and energy‐efficient hardware cryptographic accelerators.