Replica-Based Bidirectional Output Current Limiting for High-Reliability CMOS Class AB Stages

This paper presents a compact output-stage current-limiting architecture intended for reliable overcurrent protection in CMOS analog and mixed-signal circuits. In modern integrated systems, the output stages of blocks such as operational amplifiers, drivers, buffers, and reference circuits may be exposed to overload conditions, low-impedance loads, or short circuits that can lead to excessive power dissipation and device degradation. The proposed architecture employs scaled replicas of the output transistors together with local negative feedback to sense the delivered load current and independently limit both sinking and sourcing currents. The circuit is demonstrated by integration into a two-stage folded-cascode operational amplifier with a class-AB output stage and evaluated through circuit-level simulations in 130 nm CMOS technology. The results confirm a well-defined current limit across the supply and temperature corners that are relevant to high-reliability applications, spanning 2 V and 5 V supplies and a temperature range from −55 °C to 175 °C. The proposed current-limiting scheme constrains both pull-down and pull-up currents to approximately 9–12 mA across the investigated operating domain. Monte Carlo analysis further shows bounded dispersion and symmetric single-mode distributions, indicating predictable operation under device mismatch. These results demonstrate that the proposed architecture provides a compact and scalable solution for deterministic current limiting in reliability-critical CMOS systems.