Scalable Reconfigurable Circuits with Double-Gate MoS <sub>2</sub> Transistors

double-gate transistors (DGFETs), which is compatible with conventional integration processes, enabling large-scale fabrication. A 10 × 10 array was successfully demonstrated─representing the largest array to date in the field of two-dimensional reconfigurable transistors for logic. By utilizing double-gate tuning combined with the resistive voltage division mechanism of the inverter, the unit achieves four distinct logic functions using only an n-type channel, while maintaining complete matching of input and output voltage range. Furthermore, we fabricated reconfigurable circuits with XOR/XNOR function through cascaded connections and demonstrated real-time switching between half-subtractor and comparator operations, thereby fully showcasing the unit's potential of cascading. This work provides a viable and practical approach toward the scalable integration of reconfigurable transistors.

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Publication Details

Journal
ACS Nano
Published
2026-04-02
DOI
https://doi.org/10.1021/acsnano.6c02873
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
0.00

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article

Scalable Reconfigurable Circuits with Double-Gate MoS 2 Transistors

Hongyun Zhao, Kuanglei Chen, Jiankun Xiao, Xun Zhang et al.
ACS Nano
Low-power high-performance VLSI design
article

Scalable Reconfigurable Circuits with Double-Gate MoS 2 Transistors

Hongyun Zhao, Kuanglei Chen, Jiankun Xiao, Xun Zhang, Jianhua Zhang, Yu Geng, Jinsen Shang, Weiheng You, Xiaoyu He, He Jiang, Zheng Zhang
article en

Abstract

double-gate transistors (DGFETs), which is compatible with conventional integration processes, enabling large-scale fabrication. A 10 × 10 array was successfully demonstrated─representing the largest array to date in the field of two-dimensional reconfigurable transistors for logic. By utilizing double-gate tuning combined with the resistive voltage division mechanism of the inverter, the unit achieves four distinct logic functions using only an n-type channel, while maintaining complete matching of input and output voltage range. Furthermore, we fabricated reconfigurable circuits with XOR/XNOR function through cascaded connections and demonstrated real-time switching between half-subtractor and comparator operations, thereby fully showcasing the unit's potential of cascading. This work provides a viable and practical approach toward the scalable integration of reconfigurable transistors.

ACS NanoVol. 20(14)
Future Earth (CA), Advanced Materials and Devices (United States) (US), University of Science and Technology Beijing (CN)
National Natural Science Foundation of China, Ministry of Education of the People's Republic of China, National Key Research and Development Program of China, Fundamental Research Funds for the Central Universities
Affordable and clean energy
Openalex Percentile: Top 28%
Low-power high-performance VLSI design
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