Building Intuition in Amplifier Design Using Load-Pull Based Multi-Objective Visualization

This paper presents an efficient method for analyzing trade-offs during various stages of a power amplifier (PA) design. The method is based on multi-objective analysis and gives the designer multiple solutions that meet predefined requirements and provide a compromise among the desired objectives. The design approach takes simulation data and presents it in an interactive format that significantly reduces time needed for trade-off decisions and builds designer intuition. The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Load-Pull Extraction</i> (LPE) method starts from simulated source- and load-pull data swept over many parameters. This is extended to a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Selective Trade-Off</i> (STO) method to be used at different stages of a PA design for specific goals, such as sensitivity analysis and multi-stage amplifiers. To validate the LPE approach, a wideband (1.9-3.6) GHz single-stage hybrid PA using a 6-W packaged GaN HEMT is designed, with the load quality factor and with harmonic termination impedances included in the trade-off analysis. This PA demonstrates a fractional bandwidth of 61.8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> and exhibits a peak power-added efficiency of 58 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula>, large signal gain of 10.4 dB, and output power of 38.9 dBm (7.7 W). The LPE method is then extended to an STO approach example, validated on the design of an interstage network for a multistage K-band MMIC amplifier designed in a 120-nm GaN-on-SiC process. Possible further extensions of this approach include additional trade-off parameters such as transistor size selection, various process variations, as well as specific frequency dependence profile.