Optimizing arsenide/nitride interface for high-performance dissimilar length and width tfets with charge plasma modulation

This study presents a novel dissimilar-length-and-width (DLW), different-dielectric (DD), heterostructure junction less TFET (DLW-DD-HJLTFET) for low-power- high-speed applications. The proposed DLW-DD-HJLTFET operates at a low gate voltage of 1 V and employs a novel material combination of Si 0.2 Ge 0.8 /AlGaAs/InAlGaN at the source-channel-drain (S/C/D) regions, respectively. This structure integrates a heterostructure architecture, dual-dielectric gate configuration, and advanced bandgap engineering to achieve enhanced tunneling efficiency and superior electrical performance. To indicate the superiority of the reported DLW-DD-HJLTFET device, results are compared with DLW conventional SiO 2 based single dielectric—hetero-structure JLTFET (DLW-Con-HJLTFET). The key-findings reveal that the DLW-DD-HJLTFET achieves I ON ~ 95.62 μA, which is 4-times higher than DLW-Con-HJLTFET, with an I ON /I OFF ratio improved by 28-times. The subthreshold-swing (SS) is 28.19 mV/decade, marking a 3.8-times improvement, while the threshold-voltage (V th ) is 0.894-times less as compared to con-device. For RF performance, the proposed device exhibits a 2.36-times enhancement in cutoff frequency, a 2.32-times improvement in gain–bandwidth product and a 2.8-times reduction in carrier-transit-time compared to the DLW-Con-HJLTFET, demonstrating its superior suitability for high-speed-high-frequency applications.