Hybrid Memristor-CMOS System: Circuit Design Solutions for Control and Data Processing

The escalating computational demands of deep neural networks (DNNS) highlight the limitations of conventional von Neumann architectures, primarily due to the memory-processor bottleneck. Memristive crossbars, enabling in-memory computing and parallel data processing, present a promising pathway for energy-efficient neuromorphic systems. However, their widespread adoption is hindered by significant challenges, including parasitic sneak paths, device variability, and the complexity of precise large-scale control. This work presents a comprehensive co-design solution addressing these limitations. We propose a novel modified 2D1M crossbar architecture featuring spatially separated read and write lines, which effectively eliminates sneak paths while maintaining essential bipolar switching capability and enabling full-row activation for enhanced speed. Furthermore, we develop an adaptive control system centered on a reconfigurable H-bridge topology and a hybrid analog-digital interface. This system incorporates intelligent, software-programmable pulse generators for precise memristor programming, meeting critical requirements for energy efficiency, current control accuracy, and state update reliability. The implemented architecture successfully executes in-memory matrix-vector multiplication, a foundational operation for neural networks. Our findings pave the way for high-performance, scalable neuromorphic computing systems, with future work focused on experimental validation and advanced programming algorithm optimization.