Modification of Constant Voltage Stress Method for Characterizing Time-Dependent Dielectric Breakdown of Thin Gate Dielectrics of MOS Devices

A modified constant voltage stress (CVS) method is proposed for investigating the time-dependent dielectric breakdown (TDDB) of thin gate dielectrics in metal–insulator–semiconductor (MIS) devices. To enhance the efficiency of wafer-level testing, the method introduces charge injection into the gate dielectric at multiple constant voltage levels, with the voltage amplitude increasing at each successive test stage. To monitor variations in the charge state of the dielectric film during stress, the test periodically switches from the stress mode to a voltage measurement mode (Vm) of the MIS structure, in which a constant measurement current (Im) is passed through the dielectric. The current Im is carefully chosen to avoid inducing any significant further alteration in the dielectric overall charge state. This testing algorithm substantially improves measurement efficiency and expands the entire range of monitored parameters compared to the conventional constant voltage stress method used for TDDB characterization of thin gate dielectrics in MIS devices.

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Publication Details

Journal
Russian Microelectronics
Published
2025-12-01
DOI
https://doi.org/10.1134/s1063739725601985
Primary Topic
Semiconductor materials and devices
Type
article
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article

Modification of Constant Voltage Stress Method for Characterizing Time-Dependent Dielectric Breakdown of Thin Gate Dielectrics of MOS Devices

V. V. Andreev, S. A. Kornev, D. V. Andreev, V. M. Maslovsky
Russian Microelectronics
Semiconductor materials and devices
article

Modification of Constant Voltage Stress Method for Characterizing Time-Dependent Dielectric Breakdown of Thin Gate Dielectrics of MOS Devices

V. V. Andreev, S. A. Kornev, D. V. Andreev, V. M. Maslovsky
article en

Abstract

A modified constant voltage stress (CVS) method is proposed for investigating the time-dependent dielectric breakdown (TDDB) of thin gate dielectrics in metal–insulator–semiconductor (MIS) devices. To enhance the efficiency of wafer-level testing, the method introduces charge injection into the gate dielectric at multiple constant voltage levels, with the voltage amplitude increasing at each successive test stage. To monitor variations in the charge state of the dielectric film during stress, the test periodically switches from the stress mode to a voltage measurement mode (Vm) of the MIS structure, in which a constant measurement current (Im) is passed through the dielectric. The current Im is carefully chosen to avoid inducing any significant further alteration in the dielectric overall charge state. This testing algorithm substantially improves measurement efficiency and expands the entire range of monitored parameters compared to the conventional constant voltage stress method used for TDDB characterization of thin gate dielectrics in MIS devices.

Russian MicroelectronicsVol. 54(8)
Moscow Institute of Physics and Technology (RU), Moscow Power Engineering Institute (RU), Bauman Moscow State Technical University (RU), Moscow Aviation Institute (RU)
Affordable and clean energy
Openalex Percentile: Top 33%
Semiconductor materials and devices
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