Algorithms for a small–sized Type II discrete Fourier transform

The paper is devoted to the development of algorithms for the odd-time discrete Fourier transform (type II DFT, or simply DFT-II). It presents efficient computational solutions related to the implementation of a small-sized DFT-II for input sequences of lengths 3, 4, 5, 6, 7, and 8. The derivation of each algorithm is described in detail, and computational complexity estimates are provided. The developed algorithms are implemented on field-programmable gate array (FPGA) platforms such as Spartan 3 and Spartan 6, demonstrating the advantages of their implementation in hardware environments where performance and resource utilization are critical. Key performance indicators such as the number of multiplications and additions as well as FPGA resource utilization are evaluated. The values of the maximum operating frequencies achieved are given. The results show a significant improvement in computational performance compared to the direct matrix-vector product, which proves the effectiveness of the obtained solutions.