A 24 V-to-0.6~3 V Quadruple Step-Down Trans-Inductor Voltage Regulator with Phase-Overlap Operation and Ultra-Fast Transient Response for Processors

This paper presents a quadruple step-down (QSD) trans-inductor voltage regulator (TLVR) converter to accommodate the high-current and fast-transient requirements of processor power supplies. Evolved from dual-step-down (DSD) topology, the QSD configuration offers stronger load capacity; three additional flying capacitors are introduced between adjacent phases to break the 25% duty cycle constraint, thereby extending the output voltage range and accelerating the transient response. Moreover, the converter’s transient response is optimized to its full potential through both multi-phase simultaneous operation and the incorporation of the dedicated TLVR architecture. A modified adaptive on-time (AOT) controller supporting four-phase simultaneous operation is employed. Designed and verified via post-layout simulation in a 180 nm BCD process with all 6 V power transistors, the converter achieves a peak efficiency of 96.1% at 24 V input and 3 V output, as well as a maximum load capacity of 20 A. Under a 19 A load current step with a 19 ns rise time, it exhibits only a 37 mV output voltage droop and a 2 μs settling time, even with a 100 μF output capacitor.

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Publication Details

Journal
Electronics
Published
2026-03-20
DOI
https://doi.org/10.3390/electronics15061307
Primary Topic
Advanced DC-DC Converters
Type
article
Field-Weighted Citation Impact
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article

A 24 V-to-0.6~3 V Quadruple Step-Down Trans-Inductor Voltage Regulator with Phase-Overlap Operation and Ultra-Fast Transient Response for Processors

B. Li, Haoxin Cai, Zhaohui Wu
Electronics
Advanced DC-DC Converters
article

A 24 V-to-0.6~3 V Quadruple Step-Down Trans-Inductor Voltage Regulator with Phase-Overlap Operation and Ultra-Fast Transient Response for Processors

B. Li, Haoxin Cai, Zhaohui Wu
article en

Abstract

This paper presents a quadruple step-down (QSD) trans-inductor voltage regulator (TLVR) converter to accommodate the high-current and fast-transient requirements of processor power supplies. Evolved from dual-step-down (DSD) topology, the QSD configuration offers stronger load capacity; three additional flying capacitors are introduced between adjacent phases to break the 25% duty cycle constraint, thereby extending the output voltage range and accelerating the transient response. Moreover, the converter’s transient response is optimized to its full potential through both multi-phase simultaneous operation and the incorporation of the dedicated TLVR architecture. A modified adaptive on-time (AOT) controller supporting four-phase simultaneous operation is employed. Designed and verified via post-layout simulation in a 180 nm BCD process with all 6 V power transistors, the converter achieves a peak efficiency of 96.1% at 24 V input and 3 V output, as well as a maximum load capacity of 20 A. Under a 19 A load current step with a 19 ns rise time, it exhibits only a 37 mV output voltage droop and a 2 μs settling time, even with a 100 μF output capacitor.

ElectronicsVol. 15(6)
South China University of Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 11%
Advanced DC-DC Converters
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