Predicting Quantum Capacitance of a SOI Nanowire Induced Quantum Dot: On-Chip Quantum Chemistry Approach

Semiconductor silicon spin qubits (SSQs) represent one of the most promising platforms for scalable quantum computing, owing to their extremely small footprint and full compatibility with existing CMOS fabrication technologies. These qubits are typically realized via gate-defined quantum dots (QDs) in silicon nanowires, with electron or hole spins serving as quantum information carriers. Individual QD states can be capacitively coupled to a high-quality superconducting microresonator, enabling fast, nondestructive, high-fidelity readout of SSQ spin states through dispersive shifts in resonator frequency. In this work, we present modeling and calculation of the quantum capacitance of gate-defined QDs in silicon-on-insulator (SOI) nanowires—a critical parameter for optimizing SSQ device design and performance. We performed realistic 3D geometric modeling of silicon nanowire structures for two types of hole-based SSQs, computing the electric potential distribution, single-particle hole spectrum, and corresponding wave functions. This capacitance model provides a rigorous mapping between the complex many-particle quantum problem in gate-defined QDs and established single-charge tunneling theory, as applied in charge sensing and dispersive readout. A key advance is the use of the unrestricted Hartree–Fock method to solve the many-particle problem directly within the Si nanowire, using a 3D single-particle wave function basis, thereby treating the gate-defined QD as a tunable artificial on-chip atom with controllable electronic structure. Our calculations reveal that the intrinsic quantum capacitance of the gate-defined quantum dot depends nonlinearly on the plunger gate potential and can be approximately described as Cq ~ 1/|Vp|α, α ~ 1–2. For quantum dots with a suitable number of single-particle energy levels (~10) and a localization size on the order of 30 nm, the intrinsic quantum capacitance is found to be Cq ~ 30–60 aF and is subject to change about ΔCq $$ \lesssim $$ 10 aF when the QD transits between collective ground state and the nearest excited states which enables their nondestructive readout.

Authors

Institutions

Publication Details

Journal
Russian Microelectronics
Published
2025-12-01
DOI
https://doi.org/10.1134/s1063739725601663
Primary Topic
Quantum and electron transport phenomena
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Predicting Quantum Capacitance of a SOI Nanowire Induced Quantum Dot: On-Chip Quantum Chemistry Approach

V. V. Shorokhov, I. D. Kopchinskii, A. A. Popov, N. A. Shagalov
Russian Microelectronics
Quantum and electron transport phenomena
article

Predicting Quantum Capacitance of a SOI Nanowire Induced Quantum Dot: On-Chip Quantum Chemistry Approach

V. V. Shorokhov, I. D. Kopchinskii, A. A. Popov, N. A. Shagalov
article en

Abstract

Semiconductor silicon spin qubits (SSQs) represent one of the most promising platforms for scalable quantum computing, owing to their extremely small footprint and full compatibility with existing CMOS fabrication technologies. These qubits are typically realized via gate-defined quantum dots (QDs) in silicon nanowires, with electron or hole spins serving as quantum information carriers. Individual QD states can be capacitively coupled to a high-quality superconducting microresonator, enabling fast, nondestructive, high-fidelity readout of SSQ spin states through dispersive shifts in resonator frequency. In this work, we present modeling and calculation of the quantum capacitance of gate-defined QDs in silicon-on-insulator (SOI) nanowires—a critical parameter for optimizing SSQ device design and performance. We performed realistic 3D geometric modeling of silicon nanowire structures for two types of hole-based SSQs, computing the electric potential distribution, single-particle hole spectrum, and corresponding wave functions. This capacitance model provides a rigorous mapping between the complex many-particle quantum problem in gate-defined QDs and established single-charge tunneling theory, as applied in charge sensing and dispersive readout. A key advance is the use of the unrestricted Hartree–Fock method to solve the many-particle problem directly within the Si nanowire, using a 3D single-particle wave function basis, thereby treating the gate-defined QD as a tunable artificial on-chip atom with controllable electronic structure. Our calculations reveal that the intrinsic quantum capacitance of the gate-defined quantum dot depends nonlinearly on the plunger gate potential and can be approximately described as Cq ~ 1/|Vp|α, α ~ 1–2. For quantum dots with a suitable number of single-particle energy levels (~10) and a localization size on the order of 30 nm, the intrinsic quantum capacitance is found to be Cq ~ 30–60 aF and is subject to change about ΔCq $$ \lesssim $$ 10 aF when the QD transits between collective ground state and the nearest excited states which enables their nondestructive readout.

Russian MicroelectronicsVol. 54(8)
Russian Quantum Center (RU), Moscow State University (TJ)
Affordable and clean energy
Openalex Percentile: Top 26%
Quantum and electron transport phenomena
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.