Fundamental Challenges, Physical Implementations, and Integration Strategies for Ising Machines in Large‐Scale Optimization Tasks

ABSTRACT Ising machines are specialized hardware solvers designed to solve computationally hard combinatorial optimization problems by finding ground states of the Ising model. As von Neumann architecture encounters fundamental bottlenecks in data movement, parallelism, and energy consumption, diverse physical implementations of Ising machines emerge as promising alternatives. This review comprehensively examines state‐of‐the‐art Ising machine implementations across five major categories: digital complementary metal‐oxide‐semiconductor (CMOS) platforms employing various annealing strategies, analog CMOS architecture based on physical interactions, emerging device‐based systems using coupled oscillators and probabilistic bits, coherent Ising machines leveraging photonic processes, and quantum approaches including both annealing and gate‐based algorithms. Each platform provides unique advantages rooted in its underlying physics, yet all face core bottlenecks in scaling and connectivity. These limitations exacerbate issues in power efficiency, time‐to‐solution, stochasticity, and reliability. Building on this cross‐platform analysis, monolithic three‐dimensional (M3D) integration is introduced as an emerging design paradigm to overcome planar constraints through vertical functional partitioning. This approach outlines how M3D integration could relax scaling and connectivity bottlenecks and may eventually enable Ising machines to reach the scale and complexity required for large‐scale real‐world optimization problems.