AMD Versal AI-Engines for fixed latency environments

Abstract Complex, high-throughput data acquisition and processing systems, such as those used in high-energy physics experiments, are increasingly moving sophisticated pattern recognition and data compression algorithms closer to the sensors themselves. To meet these needs, programmable device manufacturers offer multi-silicon die packages that commonly include dedicated co-processors within the same package. We present a technical study of a new family of such co-processors from AMD Xilinx, the Adaptive Intelligence (AI) Engine, or AIE, as part of the Versal architecture. Specifically, we focus on the deployment capabilities of AIEs in fixed latency environments such as those typically found in colliding beam experiments like those at the Large Hadron Collider. We evaluate the performance of a vectorised implementation of both a Boosted Decision Tree (BDT) and a Convolutional Neural Network (CNN), thereby demonstrating the feasibility of deploying AIEs for ML applications in such environments and their use as possible alternatives to traditional programmable logic-based implementations