<scp>GPU</scp> Accelerated Isogeometric Topology Optimization With a Sorting‐Based Strategy

ABSTRACT This paper proposes a sorting‐based stiffness storage and solution strategy for GPU‐accelerated isogeometric topology optimization. Based on the NURBS‐based isogeometric analysis, the stiffness matrix is discretized using an interaction‐wise control point pair formulation, which avoids thread race conditions in GPU parallel assembly. To reduce memory consumption, a two‐stage sorting strategy is developed to implicitly encode the row and column indices of the sparse stiffness matrix through ordered coefficient storage without explicitly storing index arrays. On this basis, an efficient GPU‐oriented sparse matrix–vector multiplication (SPMV) algorithm is constructed and further accelerated by integrating the warp‐level LightSPMV scheme, as well as their parallel implementations for multi‐GPUs. Three numerical examples are applied to validate the effectiveness of the proposed method. Results show that it can effectively reduce the memory usage while enhancing computational efficiency. The multi‐GPU scalability is also exhibited, with about 47.40%–64.83% improvement in efficiency.

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Publication Details

Journal
International Journal for Numerical Methods in Engineering
Published
2026-03-04
DOI
https://doi.org/10.1002/nme.70273
Primary Topic
Advanced Numerical Analysis Techniques
Type
article
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article

GPU Accelerated Isogeometric Topology Optimization With a Sorting‐Based Strategy

Tao Nie, Wanpeng Zhao, Jianli Liu, Zhaohui Xia et al.
International Journal for Numerical Methods in Engineering
Advanced Numerical Analysis Techniques
article

GPU Accelerated Isogeometric Topology Optimization With a Sorting‐Based Strategy

Tao Nie, Wanpeng Zhao, Jianli Liu, Zhaohui Xia, Jinpeng Han, Tao Zhang
article en

Abstract

ABSTRACT This paper proposes a sorting‐based stiffness storage and solution strategy for GPU‐accelerated isogeometric topology optimization. Based on the NURBS‐based isogeometric analysis, the stiffness matrix is discretized using an interaction‐wise control point pair formulation, which avoids thread race conditions in GPU parallel assembly. To reduce memory consumption, a two‐stage sorting strategy is developed to implicitly encode the row and column indices of the sparse stiffness matrix through ordered coefficient storage without explicitly storing index arrays. On this basis, an efficient GPU‐oriented sparse matrix–vector multiplication (SPMV) algorithm is constructed and further accelerated by integrating the warp‐level LightSPMV scheme, as well as their parallel implementations for multi‐GPUs. Three numerical examples are applied to validate the effectiveness of the proposed method. Results show that it can effectively reduce the memory usage while enhancing computational efficiency. The multi‐GPU scalability is also exhibited, with about 47.40%–64.83% improvement in efficiency.

International Journal for Numerical Methods in EngineeringVol. 127(5)
Huazhong University of Science and Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 27%
Advanced Numerical Analysis Techniques
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