SKY130 radiation-hardened-by-design standard cell: Characterization and flow integration

This thesis presents the completion, validation, and automated characterization of a radiation-hardened standard cell library in the open source SkyWater Technology SKY130 process. Building upon prior work that demonstrated foundational hardening strategies, this work addresses the practical and methodological limitations that prevented full integration into modern digital design flows. The library was rebuilt to correct abutment, pin access, layout, and LEF (Layout Exchange Format) inconsistencies that hindered synthesis and place-and-route (PNR) integration. Key updates include redefining cell boundaries, standardizing origin coordinates, expanding substrate regions for uniform power rail alignment, correcting site and class attributes for tool compatibility, and remaking pins and ports to ensure proper routing and connectivity. Each hardened cell incorporates device level mitigation techniques such as annular gate enclosed layout transistors (ELTs), guard rings, and triple modular redundancy (TMR) flip-flops for improved radiation resilience. A fully automated characterization flow was developed to generate accurate timing, power, and noise models across the typical process, voltage,and temperature (PVT) corner, compiled into standard Liberty and LEF views, and validated through synthesis and PNR using proprietary Electronic Design Automation (EDA) environments. All cells achieved clean design rule checking (DRC) and layout versus schematic (LVS) signoff, ensuring manufacturability and schematic equivalence. The resulting RHBD SKY130 library enables consistent integration of hardened cells into existing digital design flows while preserving compatibility with open source methodologies. It provides a replicable foundation for future post-silicon radiation testing and supports ongoing efforts toward a fully open, radiation tolerant System on Chip (SoC) environment in the SKY130 process.