Analysis of a Symmetric 15-Level Multilevel Inverter with Polarity Generation Unit

This paper presents a symmetric 15-level multilevel inverter (MLI) topology designed to achieve enhanced voltage level generation with a reduced number of power electronic components. The proposed configuration is systematically divided into a level synthesis unit and a polarity reversal unit (H-bridge), enabling efficient voltage step formation and full AC output generation. The topology employs twelve power switches, including bidirectional switches in the level generation stage, which facilitate flexible current conduction and proper voltage insertion. Operating in symmetric mode with equal DC voltage sources, the inverter generates fifteen distinct voltage levels, including zero, by selectively inserting or bypassing the DC sources through appropriate switching combination. A Carrier-Based Sinusoidal Pulse Width Modulation (CB- PWM) technique is utilized to regulate the switching operation and enhance output waveform quality. The performance of the proposed topology is validated through simulation analysis under RL load conditions. The results demonstrate that the inverter produces a high-quality staircase output waveform with reduced total harmonic distortion (THD), improved voltage utilization, and efficient device operation.

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2025-07-25
DOI
https://doi.org/10.5281/zenodo.18847482
Primary Topic
Multilevel Inverters and Converters
Type
article
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article

Analysis of a Symmetric 15-Level Multilevel Inverter with Polarity Generation Unit

Kailash Kumar Mahto
Zenodo (CERN European Organization for Nuclear Research)
Multilevel Inverters and Converters
article

Analysis of a Symmetric 15-Level Multilevel Inverter with Polarity Generation Unit

Kailash Kumar Mahto
article en

Abstract

This paper presents a symmetric 15-level multilevel inverter (MLI) topology designed to achieve enhanced voltage level generation with a reduced number of power electronic components. The proposed configuration is systematically divided into a level synthesis unit and a polarity reversal unit (H-bridge), enabling efficient voltage step formation and full AC output generation. The topology employs twelve power switches, including bidirectional switches in the level generation stage, which facilitate flexible current conduction and proper voltage insertion. Operating in symmetric mode with equal DC voltage sources, the inverter generates fifteen distinct voltage levels, including zero, by selectively inserting or bypassing the DC sources through appropriate switching combination. A Carrier-Based Sinusoidal Pulse Width Modulation (CB- PWM) technique is utilized to regulate the switching operation and enhance output waveform quality. The performance of the proposed topology is validated through simulation analysis under RL load conditions. The results demonstrate that the inverter produces a high-quality staircase output waveform with reduced total harmonic distortion (THD), improved voltage utilization, and efficient device operation.

Zenodo (CERN European Organization for Nuclear Research)
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Multilevel Inverters and Converters
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