A Scalable Incremental Verilog HDL Plagiarism Detection Approach for Large-Scale Samples

Source code plagiarism detection plays an indispensable role in computer education. Over the past few decades, various tools and systems have been developed to solve software plagiarism detection with relatively satisfactory results. However, hardware description language (HDL) plagiarism detection has become a new challenge with the popularity of FPGA-based digital circuit design courses. Constructing a Verilog HDL plagiarism detection approach that supports fast incremental detection on large samples has become a thorny issue. This paper proposes a scalable approach to achieve Verilog HDL plagiarism detection that supports incremental detection on large samples. The method employs a dual-layer detection strategy at both the submission-level and the module-level. At the submission-level, it conducts project-wide comparisons, while at the module-level, it calculates a project's suspicious score through a prefix matching-based risk assessment mechanism. This approach effectively distinguishes common modules from potential plagiarism, significantly reducing the false positive rate. Our method detects more plagiarism pairs with higher accuracy than the widely used Moss (Measure of Software Similarity) system. To further validate the effectiveness of our approach, we conducted a comparative analysis with an ANTLR-based syntax-aware detector. On the dataset of Verilog HDL projects from a computer organization course (Fall 2023 and Fall 2024), our method achieved higher precision and reduced time consumption compared to the ANTLR-based model. Initially, this study leverages filtered token features and the locality-sensitive hashing algorithm to transform Verilog HDL projects into fingerprints. An efficient index is constructed to accelerate both incremental detection and batch detection. Four strategies for filtering N-Gram token sequences are used in this study. The proposed fast incremental Verilog HDL plagiarism detection approach has a logarithmic level of time complexity. Experiments were conducted to find and validate the optimal parameters for the proposed strategies on real-world datasets. The experimental results show that combining our method with Moss increases the convenience and accuracy of Verilog HDL plagiarism detection in real courses.

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Publication Details

Journal
ACM Transactions on Computing Education
Published
2026-02-26
DOI
https://doi.org/10.1145/3799248
Primary Topic
Academic integrity and plagiarism
Type
article
Field-Weighted Citation Impact
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article

A Scalable Incremental Verilog HDL Plagiarism Detection Approach for Large-Scale Samples

Kunye Liu, Zihao Zhong, Baoliang Che, Han Wan et al.
ACM Transactions on Computing Education
Academic integrity and plagiarism
article

A Scalable Incremental Verilog HDL Plagiarism Detection Approach for Large-Scale Samples

Kunye Liu, Zihao Zhong, Baoliang Che, Han Wan, Shiyang Yue, B Jiang
article en

Abstract

Source code plagiarism detection plays an indispensable role in computer education. Over the past few decades, various tools and systems have been developed to solve software plagiarism detection with relatively satisfactory results. However, hardware description language (HDL) plagiarism detection has become a new challenge with the popularity of FPGA-based digital circuit design courses. Constructing a Verilog HDL plagiarism detection approach that supports fast incremental detection on large samples has become a thorny issue. This paper proposes a scalable approach to achieve Verilog HDL plagiarism detection that supports incremental detection on large samples. The method employs a dual-layer detection strategy at both the submission-level and the module-level. At the submission-level, it conducts project-wide comparisons, while at the module-level, it calculates a project's suspicious score through a prefix matching-based risk assessment mechanism. This approach effectively distinguishes common modules from potential plagiarism, significantly reducing the false positive rate. Our method detects more plagiarism pairs with higher accuracy than the widely used Moss (Measure of Software Similarity) system. To further validate the effectiveness of our approach, we conducted a comparative analysis with an ANTLR-based syntax-aware detector. On the dataset of Verilog HDL projects from a computer organization course (Fall 2023 and Fall 2024), our method achieved higher precision and reduced time consumption compared to the ANTLR-based model. Initially, this study leverages filtered token features and the locality-sensitive hashing algorithm to transform Verilog HDL projects into fingerprints. An efficient index is constructed to accelerate both incremental detection and batch detection. Four strategies for filtering N-Gram token sequences are used in this study. The proposed fast incremental Verilog HDL plagiarism detection approach has a logarithmic level of time complexity. Experiments were conducted to find and validate the optimal parameters for the proposed strategies on real-world datasets. The experimental results show that combining our method with Moss increases the convenience and accuracy of Verilog HDL plagiarism detection in real courses.

ACM Transactions on Computing Education
Beihang University (CN)
Quality Education
Openalex Percentile: Top 46%
Academic integrity and plagiarism
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