High-Density Sub-10 nm Silicon Nanowires Fabricated via Directed Self-Assembly and Sequential Infiltration Synthesis Synergistic Patterning for Multiple Applications

This study presents a synergistic patterning technique integrating directed self-assembly lithography (DSA) and sequential infiltration synthesis (SIS) to fabricate silicon nanowires with small critical dimension, high aspect ratios, and high density on silicon-on-insulator (SOI) substrates. Through optimization of polystyrene-<i>block</i>-poly(methyl methacrylate) (PS-<i>b</i>-PMMA) guiding templates and SIS cycles, polymer templates were in situ converted into aluminum oxide (Al<sub>2</sub>O<sub>3</sub>) hard masks with high etching selectivity. Coupled with a single-layer silicon dioxide (SiO<sub>2</sub>) intermediate mask strategy, this approach significantly simplifies the device fabrication workflow while leveraging the flexibility of SiO<sub>2</sub> etching to achieve progressive scaling of silicon nanowires. Focused ion beam-transmission electron microscopy (FIB-TEM) characterization confirmed nanowire profiles with a top width of ∼6.6 nm, bottom width of ∼14.9 nm, pitch of 28 nm, and height of ∼53.5 nm, which are further used in multiple applications. The exposed sub-10 nm silicon nanowire channels exhibited ultrasensitive gas-sensing capabilities, demonstrating a 49.8% response to 2.5 ppm ammonia (NH<sub>3</sub>), significantly outperforming conventional NH<sub>3</sub> sensors. The silicon nanowire was further combined with a high-<i>k</i>/metal gate process to demonstrate its application in fin field-effect transistors (FinFETs). The device shows a switching ratio exceeding 10<sup>7</sup> and a subthreshold swing as low as 69.59 mV/dec, demonstrating exceptional electrostatic control of the Fin channel fabricated by the DSA-SIS process. This work not only provides a cost-effective manufacturing solution of high-density silicon nanowires but also demonstrates the application potential of DSA-SIS technology in semiconductor devices with a nanostructure for both sensing and integrated circuit operations.

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Publication Details

Journal
ACS Nano
Published
2026-02-24
DOI
https://doi.org/10.1021/acsnano.5c16910
Primary Topic
Nanowire Synthesis and Applications
Type
article
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article

High-Density Sub-10 nm Silicon Nanowires Fabricated via Directed Self-Assembly and Sequential Infiltration Synthesis Synergistic Patterning for Multiple Applications

Xingran Xu, Wenda Bao, Shengguang Gao, Shuoqiu Tian et al.
ACS Nano
Nanowire Synthesis and Applications
article

High-Density Sub-10 nm Silicon Nanowires Fabricated via Directed Self-Assembly and Sequential Infiltration Synthesis Synergistic Patterning for Multiple Applications

Xingran Xu, Wenda Bao, Shengguang Gao, Shuoqiu Tian, Zhonghan Cao, Yaoru Qu, Jiacheng Luo, Shuqin Han, Yifang Chen, Gang Chen, Hui Xie, Jing Wan, Sheng Tao
article en

Abstract

This study presents a synergistic patterning technique integrating directed self-assembly lithography (DSA) and sequential infiltration synthesis (SIS) to fabricate silicon nanowires with small critical dimension, high aspect ratios, and high density on silicon-on-insulator (SOI) substrates. Through optimization of polystyrene-<i>block</i>-poly(methyl methacrylate) (PS-<i>b</i>-PMMA) guiding templates and SIS cycles, polymer templates were in situ converted into aluminum oxide (Al<sub>2</sub>O<sub>3</sub>) hard masks with high etching selectivity. Coupled with a single-layer silicon dioxide (SiO<sub>2</sub>) intermediate mask strategy, this approach significantly simplifies the device fabrication workflow while leveraging the flexibility of SiO<sub>2</sub> etching to achieve progressive scaling of silicon nanowires. Focused ion beam-transmission electron microscopy (FIB-TEM) characterization confirmed nanowire profiles with a top width of ∼6.6 nm, bottom width of ∼14.9 nm, pitch of 28 nm, and height of ∼53.5 nm, which are further used in multiple applications. The exposed sub-10 nm silicon nanowire channels exhibited ultrasensitive gas-sensing capabilities, demonstrating a 49.8% response to 2.5 ppm ammonia (NH<sub>3</sub>), significantly outperforming conventional NH<sub>3</sub> sensors. The silicon nanowire was further combined with a high-<i>k</i>/metal gate process to demonstrate its application in fin field-effect transistors (FinFETs). The device shows a switching ratio exceeding 10<sup>7</sup> and a subthreshold swing as low as 69.59 mV/dec, demonstrating exceptional electrostatic control of the Fin channel fabricated by the DSA-SIS process. This work not only provides a cost-effective manufacturing solution of high-density silicon nanowires but also demonstrates the application potential of DSA-SIS technology in semiconductor devices with a nanostructure for both sensing and integrated circuit operations.

ACS NanoVol. 20(9)
Fudan University (CN), The Future University (SD), Shanghai Zhangjiang Laboratory (CN), Future Law (MY), Future Earth (CA), Integrated Systems Solutions (United States) (US)
Openalex Percentile: Top 47%
Nanowire Synthesis and Applications
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