Optimization of key process parameters for cobalt sputtering in 0.11  <i>μ</i> m CMOS devices

This study systematically investigates the effects of cobalt (Co) film thickness, pretreatment conditions, and radio frequency (RF) bias power on the formation of CoSi2 films and the corresponding device performance in 0.11 μm CMOS technology. The results indicate that a Co thickness of 9 nm is optimal; deviations from this value lead to abnormal contact resistance variations and yield loss. The interface quality is optimal when using argon plasma bombardment to remove an oxide layer thickness (i.e., the pretreatment thickness) of 3 nm. Thicknesses exceeding 4 nm can damage the silicon lattice, leading to leakage fluctuations and reduced yield (yield is only 83% at 6 nm). When the RF bias power is 200 W, it is the optimal condition compared with 140 and 260 W. Additionally, the queue time (Q-time) between wet preclean and Co deposition must be controlled within 4 h; extending to 8 h increases leakage current by 25% and reduces yield to 91%. The optimized Co deposition parameters provide a reliable process window for industrial manufacturing.

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Publication Details

Journal
Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena
Published
2026-02-23
DOI
https://doi.org/10.1116/6.0005238
Primary Topic
Semiconductor materials and interfaces
Type
article
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article

Optimization of key process parameters for cobalt sputtering in 0.11  μ m CMOS devices

Yaohui Zhou, Mincheng Li, Yan Zhang, Furong Wang et al.
Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena
Semiconductor materials and interfaces
article

Optimization of key process parameters for cobalt sputtering in 0.11  μ m CMOS devices

Yaohui Zhou, Mincheng Li, Yan Zhang, Furong Wang, Shaohui Xu, Zhenhua Song
article en

Abstract

This study systematically investigates the effects of cobalt (Co) film thickness, pretreatment conditions, and radio frequency (RF) bias power on the formation of CoSi2 films and the corresponding device performance in 0.11 μm CMOS technology. The results indicate that a Co thickness of 9 nm is optimal; deviations from this value lead to abnormal contact resistance variations and yield loss. The interface quality is optimal when using argon plasma bombardment to remove an oxide layer thickness (i.e., the pretreatment thickness) of 3 nm. Thicknesses exceeding 4 nm can damage the silicon lattice, leading to leakage fluctuations and reduced yield (yield is only 83% at 6 nm). When the RF bias power is 200 W, it is the optimal condition compared with 140 and 260 W. Additionally, the queue time (Q-time) between wet preclean and Co deposition must be controlled within 4 h; extending to 8 h increases leakage current by 25% and reduces yield to 91%. The optimized Co deposition parameters provide a reliable process window for industrial manufacturing.

Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and PhenomenaVol. 44(2)
Industry, innovation and infrastructure
Openalex Percentile: Top 45%
Semiconductor materials and interfaces
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