Electrical modelisation of a bitflip in SRAM cell memory induced by laser fault injection

An electrical model of the bitflip in SRAM under laser illumination simulating laser fault injection is proposed. This model is based on a bipolar phototransistor responsible of the amplified induced photocurrent resulting to the Off/On switching of MOSFET in CMOS inverter. In this model a photodiode is connected between the collector(drain)/base(bulk) of the parasitic bipolar transistor. In this configuration the photodiode acts as photocurrent generator and the bipolar transistor as amplifier. The ability of this model to simulate the laser fault injection is first shown in CMOS inverter and then in SRAM cell memory.