hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

We present hls4ml, a free and open-source platform that translates machine learning (ML) models from modern deep learning frameworks into high-level synthesis (HLS) code that can be integrated into full designs for field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). With its flexible and modular design, hls4ml supports a large number of deep learning frameworks and can target HLS compilers from several vendors, including Vitis HLS, Intel oneAPI and Catapult HLS. Together with a wider eco-system for software-hardware co-design, hls4ml has enabled the acceleration of ML inference in a wide range of commercial and scientific applications where low latency, resource usage, and power consumption are critical. In this paper, we describe the structure and functionality of the hls4ml platform. The overarching design considerations for the generated HLS code are discussed, together with selected performance results.

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Publication Details

Journal
Repository for Publications and Research Data (ETH Zurich)
Published
2025-12-01
DOI
https://doi.org/10.3929/ethz-c-000793555
Primary Topic
Embedded Systems Design Techniques
Type
article
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article

hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

David G. Burnette, Nicolò Ghielmetti, S.S. Demirsoy, Jovan Mitrevski et al.
Repository for Publications and Research Data (ETH Zurich)
Embedded Systems Design Techniques
article

hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

David G. Burnette, Nicolò Ghielmetti, S.S. Demirsoy, Jovan Mitrevski, Dimitrios Danopoulos, Benjamin Ramhorst, Stylianos Tzelepis, Maurizio Pierini, Lauri Laatu, Quentin Berthet, Javier Duarte, Marco Colombo, et al., Enrico Lupi, Vladimir Loncar, Thea Aarrestad, Sioni Summers, Haoyan Wang, Chang Sun, Paul White, Konstantinos Axiotis
article en

Abstract

We present hls4ml, a free and open-source platform that translates machine learning (ML) models from modern deep learning frameworks into high-level synthesis (HLS) code that can be integrated into full designs for field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). With its flexible and modular design, hls4ml supports a large number of deep learning frameworks and can target HLS compilers from several vendors, including Vitis HLS, Intel oneAPI and Catapult HLS. Together with a wider eco-system for software-hardware co-design, hls4ml has enabled the acceleration of ML inference in a wide range of commercial and scientific applications where low latency, resource usage, and power consumption are critical. In this paper, we describe the structure and functionality of the hls4ml platform. The overarching design considerations for the generated HLS code are discussed, together with selected performance results.

Repository for Publications and Research Data (ETH Zurich)
Openalex Percentile: Top 24%
Embedded Systems Design Techniques
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