Stress-Driven Reliability-by-Design for Heterogeneous Integration: From Packaging Architectures to Intelligent Management

As traditional computing architectures encounter fundamental limits in performance and energy efficiency, heterogeneous integration (HI) has become crucial for ongoing progress, especially in emerging fields such as artificial intelligence, quantum computing, and photonic computing. The dense co-integration of components with different physical properties and manufacturing processes, however, introduces new reliability challenges based on multi-source, cross-scale, and strongly coupled multi-physics phenomena. These issues pose a significant obstacle to fully realizing the potential of HI and reaching new computing frontiers. This review provides a systematic approach to understanding and addressing these reliability problems. We begin by analyzing the physics and interfacial challenges of integrating novel heterogeneous materials and devices to identify the microscopic causes and failure mechanisms. Building on this physical foundation, we then review reliability-focused innovations in packaging and system design, demonstrating how advanced interconnects and system-level strategies can support the scalability and energy efficiency of future computing systems. Finally, the review explores the emerging field of intelligent reliability, explaining how methods such as co-simulation, integrated sensing, and AI-driven prediction and adaptive management can incorporate reliability as a key design element. This work outlines a strategic path toward developing future high-efficiency, high-throughput, and adaptable heterogeneous computing platforms.

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Publication Details

Journal
Chip
Published
2026-02-01
DOI
https://doi.org/10.1016/j.chip.2026.100195
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.00
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article

Stress-Driven Reliability-by-Design for Heterogeneous Integration: From Packaging Architectures to Intelligent Management

Liqiang Cao, Peng He, Weitong Sun, Xinyi Jing et al.
Chip
3D IC and TSV technologies
article

Stress-Driven Reliability-by-Design for Heterogeneous Integration: From Packaging Architectures to Intelligent Management

Liqiang Cao, Peng He, Weitong Sun, Xinyi Jing, Shuye Zhang
article en

Abstract

As traditional computing architectures encounter fundamental limits in performance and energy efficiency, heterogeneous integration (HI) has become crucial for ongoing progress, especially in emerging fields such as artificial intelligence, quantum computing, and photonic computing. The dense co-integration of components with different physical properties and manufacturing processes, however, introduces new reliability challenges based on multi-source, cross-scale, and strongly coupled multi-physics phenomena. These issues pose a significant obstacle to fully realizing the potential of HI and reaching new computing frontiers. This review provides a systematic approach to understanding and addressing these reliability problems. We begin by analyzing the physics and interfacial challenges of integrating novel heterogeneous materials and devices to identify the microscopic causes and failure mechanisms. Building on this physical foundation, we then review reliability-focused innovations in packaging and system design, demonstrating how advanced interconnects and system-level strategies can support the scalability and energy efficiency of future computing systems. Finally, the review explores the emerging field of intelligent reliability, explaining how methods such as co-simulation, integrated sensing, and AI-driven prediction and adaptive management can incorporate reliability as a key design element. This work outlines a strategic path toward developing future high-efficiency, high-throughput, and adaptable heterogeneous computing platforms.

Chip
Chinese Academy of Sciences (CN), Harbin Institute of Technology (CN), University of Malaya (MY), Institute of Microelectronics (CN)
Affordable and clean energy
Openalex Percentile: Top 59%
3D IC and TSV technologies
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Stress-Driven Reliability-by-Design for Heterogeneous Integration: From Packaging Architectures to Intelligent Management — Liqiang Cao, Peng He, et al. · Chip (2026) | TGRS Research Map | TGRS