Characterization of vertical AZO/p-GaN/n-GaN heterojunction bipolar transistor
Vertical device architectures are attracting attention for power electronics applications owing to their high current capabilities and space-efficient layouts. In this study, we demonstrate a GaN-based vertical heterojunction bipolar transistor employing aluminum-doped zinc oxide (AZO) as the collector layer, deposited by radio frequency sputtering at a low temperature. This low-temperature process avoids thermal damage to the underlying p-GaN base layer and provides a fabrication-compatible route for device integration. Numerical simulations indicated that the AZO/p-GaN/n-GaN stack formed suitable band alignments to support transistor operation. The fabricated device showed current switching and amplification in the common-base configuration, while the common-emitter mode exhibited abnormal behavior caused by reverse leakage at the base–collector junction. These results confirm the viability of the low-temperature AZO-based approach and indicate its potential for integration into high-performance vertical high-power transistors.
Authors
- Dong Yeong Kim (ORCID: https://orcid.org/0000-0003-0365-7668)
- S.M. Kim (ORCID: https://orcid.org/0009-0007-8703-6995)
- Dong Hoe Kim (ORCID: https://orcid.org/0000-0001-8909-2076)
- J. Y. Cho
- Goeun Bang
- Jongseob Kim
- Kyoung-Kook Kim
- Taenam Kwon
Institutions
- Samsung (South Korea) (KR)
- Seoul Semiconductor (South Korea) (KR)
- Jeonbuk National University (KR)
- Pukyong National University (KR)
Publication Details
- Journal
- Applied Physics Letters
- Published
- 2026-02-09
- DOI
- https://doi.org/10.1063/5.0300545
- Primary Topic
- GaN-based semiconductor devices and materials
- Type
- article
- Field-Weighted Citation Impact
- 0.00