Integrated Voltage Regulator with Improved Stability to Noise in Supply Networks

In modern communication devices, IC developers widely use power management schemes. The inclusion of linear voltage regulators in the ICs not only allows voltage levels to be generated but also helps to obtain a cleaner internal supply voltage. The use of classic regulators leads to a low power supply rejection ratio (PSRR), which requires special solutions to achieve acceptable characteristics. In this study, the structure of a low dropout (LDO) regulator with a reduced voltage drop between the input and output and improved PSRR parameter is considered. The proposed solution provides a PSRR level of up to 45 dB in the 1–10 MHz interference frequency range, taking into account the PSRR profile of the reference voltage source, leads to an improvement in the stability of the voltage regulator, and finally results in a reduction in the output noise of the LDO regulator.