Programmable Packet Scheduling on FPGA-based Switches

Authors

Jonathan Rivalan (ORCID: https://orcid.org/0000-0002-3779-556X)
Mario Patetta (ORCID: https://orcid.org/0009-0001-0142-7087)
Mufaddal Enayathhussain

Publication Details

Journal: SPIRE - Sciences Po Institutional REpository
Published: 2025-12-17
Primary Topic: Software-Defined Networks and 5G
Type: article
Field-Weighted Citation Impact: 0.00

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article

Programmable Packet Scheduling on FPGA-based Switches

Jonathan Rivalan, Mario Patetta, Mufaddal Enayathhussain

Dec 17, 2025

SPIRE - Sciences Po Institutional REpository

Software-Defined Networks and 5G

article

Programmable Packet Scheduling on FPGA-based Switches

Jonathan Rivalan, Mario Patetta, Mufaddal Enayathhussain

December 17, 2025article en

Abstract

No abstract available for this paper.

SPIRE - Sciences Po Institutional REpository

Openalex Percentile: Top 26%

Software-Defined Networks and 5G

OpenAlex

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Programmable Packet Scheduling on FPGA-based Switches — Jonathan Rivalan, Mario Patetta, et al. · SPIRE - Sciences Po Institutional REpository (2025) | TGRS Research Map | TGRS